Micron has announced that G11 will be its first 3D NAND Flash and is actively working on bringing its next-generation G11 NAND technology to production. Its current G9 technology is shipping across Micron's product portfolio with over 200 layers of scaling; as the current technology reaches its limitations, Micron aims with G11 to use wafer-on-wafer 3D NAND stacking to double the capacity of NAND modules, splitting each wafer into a memory cell wafer and one containing peripheral logic circuits, combined via hybrid bonding technology. Micron plans to ship 400-layer NAND in the second half of 2027. The source also notes that Chinese NAND maker YMTC has been making 3D stacked NAND for some time using Xtacking technology. This is a plan, not an achieved result.
At an event this week, Micron announced that its next-generation 3D NAND (G11), which it plans to enter mass production in 2H 2027, is set to offer three significant advantages: doubling storage density (approximately twice the bit density of G9, with 3D TLC going from 21 Gb/mm² to 42 Gb/mm²), increasing I/O performance by up to 50% versus the company's current-generation NAND memory (interface speed from 3,600 MT/s to 5,400 MT/s), and reducing data transfer energy consumption per bit by more than 25%. G11 will adopt wafer-on-wafer bonding, manufacturing the NAND array on a new 3D NAND node and the peripheral circuits and I/O on a logic process before bonding them together, and will transition to more than 400 NAND layers; Micron has not disclosed the exact number of active wordline layers or memory decks. Micron executive Scott DeBoer described G11 as the world's most advanced NAND, ramping in the second half of next year. Micron also expects to disclose more G11 technical details in 2027 and, beyond G11, is developing high-mobility materials and denser cell architectures to continue XYZ scaling; specific architectural details, density targets, or production schedules for post-G11 generations have not been disclosed. These are the company's stated plans and expectations; mass production has not yet occurred.
3D NANDG11 3D NANDMicronTom's HardwareCapacity Change
According to Counterpoint Research, YMTC, known primarily as a NAND Flash manufacturer, has been producing about 5,000 wafers per month of 16 Gb LPDDR5X DRAM running at 7,500 MT/s at its Fab 2 since October 2025. The company is now preparing to begin volume production of LPDDR5X memory with speeds of 9,600 MT/s at its Fab 3, using Vertical Channel Transistor (VCT) 4F² cell structure technology. The volume production remains in the preparation stage and is a planned event.
TrendForce notes that Micron plans to begin mass producing its 1-delta (1δ) nm process in 2027, which is set to succeed its current mainstream 1-gamma (1γ) nm process. Beyond this transition, Micron intends to continue scaling its 6F² architecture before moving directly to 3D DRAM, bypassing the intermediate 4F² architecture; in contrast, South Korean and Chinese DRAM manufacturers still plan to adopt 4F² architecture, highlighting a growing divergence in process technology roadmaps among major suppliers. Micron is also developing memory solutions optimized for AI solutions, including vHBM and vEIM, to compete with SK hynix's 3D HBM and Samsung's zHBM. In NAND flash, Micron is preparing to ramp up production of its G11 generation in 2H27; by incorporating wafer bonding and stacking more than 400 layers, G11 is expected to deliver twice the bit density of G9, alongside a targeted 1.5-fold improvement in I/O speed. TrendForce believes these advances will enable Micron to close the technology gap with Kioxia and YMTC—both early adopters of hybrid bonding architectures—and strengthen its competitive position as NAND performance becomes increasingly critical to an AI-driven market. All of these remain plans/expectations, not yet realized mass production.
1-delta nm DRAM processvHBMvEIMMicronTrendForce Official (Market Data)Capacity Change
At SEMICON West 2026, under the theme "Optical Integration for the Next Generation of AI," NVIDIA presented its next-generation co-packaged optics (CPO) technology, including an optics-on-interposer (OOI) prototype that moves optical engines from the organic package substrate onto the silicon interposer carrying the computing chips; according to The Elec, this eliminates the organic substrate from the electrical signal path, allowing signals to travel through shorter, fine-pitch interposer connections that could increase bandwidth density and reduce power consumption. NVIDIA also demonstrated DWDM technology that, according to Wccftech, combines eight wavelengths operating at up to 32 Gb/s each, delivering an aggregate bandwidth of 256 Gb/s per fiber. Both technologies remain in the research stage with no commercialization timeline announced, and NVIDIA said it is evaluating them for potential future products. Looking ahead, NVIDIA plans to extend optical interconnects with its Kyber NVL1152 architecture, which will connect eight racks into a single 1,152-GPU NVLink domain and support the Feynman platform, which Wccftech says is expected to arrive in 2028. On existing products, in May 2026 NVIDIA announced that its Spectrum-X Ethernet Photonics switches had entered full production, integrating 200Gb/s SerDes with CPO technology for the Vera Rubin platform, with CoreWeave, Lambda, and Oracle Cloud Infrastructure among early adopters; its manufacturing ecosystem includes TSMC for silicon photonics fabrication, SPIL for chip-scale packaging, assembly, and testing, TFC for laser die packaging and reliability validation, and Foxconn for integrating Spectrum-X Photonics switches into complete networking systems, plus Coherent, Lumentum, and Sumitomo Electric for external laser source modules, Corning, Senko, and Browave for optical fibers and related components, and Fabrinet for cooling and final testing.
Samsung Electronics and SK Hynix are upgrading their NAND flash factories in China to make chips with more than 200 layers, Reuters reported on October 21, citing four people familiar with the plans. According to the report, the move would let the South Korean memory makers win back ground lost to Yangtze Memory Technologies Co (YMTC), even though US curbs on upgrading their China operations remain formally in place. This is a reported plan under way; no completion timeline is given and the US restrictions have not been lifted.
NAND flashSamsung Electronics, SK Hynix and 3 totalDigiTimes AsiaCapacity Change
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Samsung Electronics, SK Hynix, Yangtze Memory Technologies Co (YMTC)
The article lists ten leading Chinese semiconductor companies: SMIC is China's largest foundry with roughly $9.3 billion revenue in 2025; CXMT is the leading domestic DRAM maker with revenue surging past $8 billion; Huawei HiSilicon is the top chip design house (Kirin, Ascend AI, etc.); JCET Group is China's largest OSAT/packaging & testing firm; NAURA Technology Group is a leading semiconductor equipment maker; Hua Hong Semiconductor/Huahong Group is a major pure-play foundry focused on specialty/mature nodes; YMTC is the main domestic 3D NAND flash producer; Will Semiconductor (OmniVision) is a major image sensor and analog/design player; Tongfu Microelectronics is a second-tier but large packaging & testing company; and Cambricon Technologies or Hygon Information are leading AI accelerator or x86-compatible server CPU players respectively. The source does not state the cause, and no price movement, capacity change, or policy event is reported.
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SMIC, CXMT, Huawei HiSilicon, JCET Group, NAURA Technology Group, Hua Hong Semiconductor, YMTC, Will Semiconductor, Tongfu Microelectronics, Cambricon Technologies, Hygon Information
According to Reuters, as AI-driven demand extends from DRAM to NAND and competition from China's YMTC intensifies, Samsung and SK hynix are planning upgrades at their Chinese NAND facilities: Samsung plans to shift its Xi'an plant from roughly 200-layer to 286-layer V9 NAND under an internal project dubbed "Monami"; SK hynix, already authorized to produce up to 240-layer NAND in Dalian, is reportedly planning to upgrade from its current 192-layer technology to 240 layers or more, and may seek U.S. approval for R&D on 300-plus-layer technology. TrendForce estimates China accounts for roughly 30–35% of Samsung's total NAND output and an even higher 40–45% for SK hynix. U.S. export restrictions remain a major hurdle: both chipmakers must obtain annual licenses to install U.S.-made equipment at their Chinese plants, and Washington indicated in 2025 that it would not approve technology upgrades or capacity expansions there; both companies confirmed to Reuters that upgrades were underway in close coordination with Washington but declined to disclose detailed production plans. On competition, YMTC's NAND lineup is dominated by 160- and 232-layer products, it is already producing 294-layer chips in limited volumes and plans to push beyond 300 layers. Separately, per Seoul Economic Daily, Samsung has shifted roughly 60% of its V-NAND capacity to V9 (286 layers), is ramping shipments to NVIDIA, has begun mass production and supply of V10 NAND, and is accelerating development of next-generation V11 targeting around 500 layers; per Bloter, SK hynix is stepping up its shift to 321-layer NAND, which became its largest NAND production segment in 2Q26, with roughly half of its domestic NAND capacity expected to transition to 321-layer products by year-end.
NAND flashSamsung, SK hynix and 3 totalTrendForceCapacity Change
According to Commercial Times, institutional investors remain optimistic about the memory industry's long-term outlook, supported by expanding AI inference demand and limited new supply of mature memory products, despite slowing gains; fourth-quarter DRAM contract prices in 2026 are expected to rise about 20% quarter-on-quarter. The projected increase marks a slowdown from approximately 80% in the second quarter and 40% in the third, which the report attributes to a higher comparison base, weakening end-market purchasing power, and price ceilings under long-term agreements (LTAs) gradually taking effect. CXMT has announced progress in its next-generation 4F² DRAM architecture, which institutional investors note could theoretically reduce memory cell area by about 33% compared with the mainstream 6F² design, though mass production still faces challenges involving yields, leakage current, and data retention; it remains unclear whether the 4F² design applies to the entire DRAM cell or only specific areas, with full commercialization generally expected after 2028, and MoneyToday notes CXMT's announcement has yet to significantly affect DRAM spot prices, which continue to rise. Per Chosun Biz, companies including Apple and Tesla have raised the possibility of turning to Chinese suppliers such as CXMT and YMTC as memory costs climb, though analysts see limited near-term price pressure given constraints on Chinese suppliers' pricing competitiveness, available volumes, and sales markets. According to Commercial Times, if NVIDIA switches Rubin Ultra from 12-Hi to 8-Hi HBM while keeping the number of stacks per GPU and capacity per DRAM layer unchanged, HBM capacity per GPU would fall by about 33%, while the same DRAM die supply could theoretically support 50% more GPUs; TrendForce notes 8-Hi HBM is expected to cost 10–20% more per Gb than 12-Hi in 2027. Institutional investors note that larger AI models, longer context windows, and growing KV cache requirements are driving demand for greater memory capacity and bandwidth, particularly server DRAM and enterprise SSDs.
DRAMHBMserver DRAMCXMT, NVIDIATrendForcePrice Movement
Ahead of its October 31 earnings release, CXMT forecast revenue of RMB 265–270 billion for the first nine months of 2026, up more than sevenfold YoY, and at its October 19 extraordinary shareholders' meeting projected net profit attributable to shareholders of RMB 131–132.5 billion for the first nine months of 2026, a sharp reversal from a net loss of RMB 5.3 billion in the same period last year. According to Eastmoney, third-quarter net profit is expected to rise just 1–4% QoQ to RMB 53.40–54.90 billion, with Q3 revenue projected at RMB 114.69–119.69 billion, up 15.25–20.28% QoQ — a sharp slowdown from 1H26, when net profit more than doubled to RMB 52.84 billion in 2Q26. Eastmoney attributes the cooling momentum to moderating DRAM price gains, which may narrow room for further profit expansion. Per 36Kr, DDR and LPDDR ASPs climbed 61% and 24.46% YoY in 2025, driving revenue growth of 515.36% and 105.59% respectively; in 1H26, DDR and LPDDR revenue reached RMB 69.47 billion and RMB 78.19 billion respectively. Peer module maker Longsys saw net profit climb from RMB 3.86 billion in 1Q26 to RMB 6.72 billion in 2Q26, but its 3Q profit is expected at RMB 3.42–4.32 billion, a sequential decline of up to 49%. TrendForce projects more moderate contract price increases of 13–18% QoQ for conventional DRAM and 10–15% for NAND Flash in 3Q26, noting record-high memory prices are pushing PC and smartphone customers toward affordability limits. CXMT said its Hefei and Beijing fabs continue to run at high utilization with full order books; it currently operates two 12-inch DRAM fabs in Hefei and one in Beijing, each with monthly capacity of up to 100,000 wafers, is expanding its Hefei testing facility and developing new DRAM and HBM production lines in Shanghai, and its 1H26 depreciation expenses rose 27.85% YoY to RMB 14.51 billion. Whether CXMT can sustain earnings momentum hinges on its October 31 results and the trajectory of fourth-quarter DRAM prices.
According to Counterpoint Technology Market Research, with AI-driven NAND demand entering a supercycle, Yangtze Memory Technologies Co. (YMTC) is positioned as the fastest-growing memory supplier: its revenue in 2026 is projected to grow six times faster than that of the overall industry and its peers as it expands aggressively into server-related business. This is a market research projection, not an achieved result. The headline indicates YMTC is betting on premium eSSDs to take on Samsung.
NANDpremium eSSDsYangtze Memory Technologies Co. (YMTC), SamsungDigiTimes Asia
China's Yangtze Memory Technologies (YMTC) is developing a next-generation 4F² DRAM design targeting data transfer speeds of 9,600 MT/s, expanding beyond NAND flash, and pursuing a CNY33 billion (approx. US$4.93 billion) Shanghai initial public offering.
4F² DRAM designYangtze Memory Technologies (YMTC)DigiTimes Asia
According to Reuters, SK hynix is reportedly asking the U.S. government to authorize additional semiconductor manufacturing equipment shipments to its Dalian facility in China in exchange for a commitment to build a new NAND fab in the U.S. The Dalian fab is the world's only facility to produce 192-layer floating gate 3D NAND for Solidigm's data center-grade SSDs for AI, enterprise, and hyperscale data centers; its manufacturing operations rely on equipment from American suppliers including Applied Materials, KLA, and Lam Research, whose exports to China require a U.S. government license. Solidigm has requested U.S. export licenses for additional tools, but the U.S. government has yet to authorize the shipments; last December the U.S. Commerce Department granted SK hynix a limited authorization for equipment deliveries to Dalian for 2026, but has not issued a similar equipment export authorization for 2027. Solidigm wants to install additional manufacturing equipment in the unused portions of its Dalian Mod B facility, completed in 2023, and is also considering an initial public offering as early as 2027 to raise additional capital. The proposed U.S. fab and the equipment export arrangement remain reported proposals, not approved or implemented actions.
3D NAND192-layer floating gate 3D NANDdata center-grade SSDsSK hynix, Solidigm and 5 totalTom's HardwarePolicy/Regulation
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SK hynix, Solidigm, Applied Materials, KLA, Lam Research
ASML's Q3 2026 financial results show shipments to China surged to 23% of system sales, up from 14% in the previous quarter, becoming one of its strongest areas. Chinese semiconductor manufacturers are rushing to stockpile more tools. Taiwan remains the largest buyer at 32%, followed by South Korea at 31%. The United States is reportedly pressuring the Dutch government to completely halt tool exports to China. CXMT and YMTC have secured sufficient DUV lithography tools from ASML to support their growth plans for the next three years.
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ASML, Chinese semiconductor manufacturers, CXMT, YMTC
According to Yicai Global, CXMT President Cao Kanyu introduced the company's 4F² DRAM architecture at the October 10 Integrated Circuits and Chiplet Conference, with plans to launch next-generation DDR5 RDIMMs based on the technology by year-end — a plan, not a confirmed high-volume production milestone. As explained by MyDrivers, the industry currently relies on 6F² designs, in which each memory cell occupies six times the square of the minimum feature size; 4F² reduces that footprint to four times, potentially boosting memory density by 30%–50% within the same area. Central to CXMT's approach is a Vertical Surrounded Gate (VSG) transistor, which improves electrostatic control while reducing leakage current and short-channel effects. Cao said CXMT has more than 300 published patent families related to the 4F² architecture. Per TrendForce, CXMT ranked fourth in global DRAM revenue in 2Q26, with its market share climbing to 9.5% from 7.6% in the previous quarter, trailing Samsung (39.4%), SK hynix (24.9%) and Micron (23.3%). Meanwhile, Samsung unveiled a 16Gb prototype combining 4F² cells and wafer-to-wafer hybrid bonding at ISSCC 2026, but is reportedly prioritizing hybrid bonding for commercialization; that technology is not expected to reach the market before 2028, with no firm timeline for 4F² integration. Wccftech reports Samsung is eyeing 4F² adoption for its B1b process, reportedly renamed D0a, while SK hynix is advancing vertical-gate (VG) 4F² DRAM. According to Money Today, CXMT's upcoming products may only partially adopt 4F² technology, and achieving high-volume production remains a separate hurdle.
Micron CEO Sanjay Mehrotra forecasts tighter supply-demand conditions in fiscal 2027 and 2028 compared to 2026, citing delayed capacity additions from the 'Big Three' until late 2028. This outlook contradicts previous expectations of gradual supply improvement and suggests a prolonged shortage period driven by infrastructure gaps.
DRAMNAND FlashHBMMicron Technology, Samsung Electronics and 3 totalTrendForceCapacity Change
Tencent signed a $7 billion, 5-year deal with Oracle for 100,000 advanced AI chips in Southeast Asia to bypass China's chip restrictions. This confirms massive demand for high-end compute from Chinese tech giants like ByteDance, driving up prices and exacerbating shortages.
AI ChipsNVIDIA H100NVIDIA B200Tencent, Oracle and 5 totalTrendForceShortage Alert
A German court has issued injunctions against Micron for infringing YMTC's 3D NAND patents, potentially restricting supply in Germany. Micron has appealed the ruling. This legal victory for YMTC creates a supply constraint for NAND Flash.
Acer CEO Jason Chen expects PC prices to rise 5% to 20% in Q4 2026. While DDR4, DDR5, and CPU supplies are stabilizing, memory and SSD costs remain elevated, delaying price corrections. Bullish: PC Average Selling Prices (ASP) are expected to peak around mid-2027.
DDR4DDR5CPUAcer, CXMT and 3 totalTechPowerUpPrice Movement
CXMT plans to establish a NAND R&D line in Beijing and has discussed plans with customers. Due to the memory shortage, CXMT charged more than Samsung for 64 GB DDR5 server modules in July. Bullish: Shortage grants pricing power, though TrendForce expects NAND supply tightness to ease in H2 next year.
DDR5NAND FlashCXMT, Samsung Electronics and 3 totalTechPowerUpShortage Alert