[Tech Note] Why does AI still have to wait with tens of thousands of GPUs? How silicon photonics and CPO are building the ‘highways of light’

What happened

This is a background technology column published on October 29, 2026 (authored by Professor Younghyun Kim of Hanyang University ERICA), explaining — not reporting — industry developments; it contains no price, capacity or policy event. The article states that AI data center bottlenecks have shifted from GPU compute speed to data movement: copper interconnects suffer signal loss, heat and repeater power overhead at high speeds and longer distances, so networks are shifting to silicon-photonics-based optical interconnects; co-packaged optics (CPO) places optical engines next to the switch ASIC to shorten electrical paths, increase bandwidth density and save power. It cites Meta's evaluation of a CPO switch system presented at ECOC 2025, in which power consumption in the optical interconnect portion was approximately 65% lower than a comparable pluggable architecture, with connection stability confirmed under the specific test conditions; companies such as NVIDIA and Broadcom are accelerating commercialization by introducing network products incorporating CPO technology. The article also describes LPO (removable modules with the DSP eliminated) and NPO (optical engines close to but outside the switch package) as alternative approaches, explains that HBM and CPO reduce GPU data-wait time at the memory and network levels respectively, and notes remaining CPO challenges including laser light supply, fiber connection, heat from ASICs, and yield improvement.

Impact and signal

Affected components and suppliers

Source and time

Source: SK Hynix Newsroom · 10/28/2026 · View original source