UMC and AP Memory announced a collaboration on silicon capacitor technology, combining deep trench capacitor technology and silicon capacitor designs for advanced packaging power delivery in AI and HPC systems. The source does not state a specific timeline, capacity, or commercial terms. This is an announced collaboration; its actual implementation is not confirmed by the source.
silicon capacitordeep trench capacitorUMC, AP MemoryEE Times AsiaPartnership/M&A
Semiconductor IP company Chips&Media disclosed its third-quarter 2026 results on Oct. 27, reporting consolidated revenue of 7.162 billion won, up 8.2% year on year, and operating profit of 1.657 billion won, up 8.7% year on year. Growth was driven by IP licensing revenue: third-quarter licensing revenue rose 33% year on year to 4.431 billion won. The company secured its first licensing contract related to a domestic on-device AI semiconductor project, won a new automotive project from a major South Korean fabless chipmaker, signed new licensing agreements with Chinese customers for AI SoCs and humanoid robots, and signed a new mobile licensing agreement with existing customer Google. Royalty revenue, however, fell 26.5% year on year to 2.165 billion won; per the source, the decline reflected reduced chip production by customers amid memory supply shortages and rising prices. The company expects royalty revenue to return to growth in 2027, with domestic fabless AI SoC customers scheduled to begin mass production of chips for robots, home appliances and IoT devices. Service revenue increased 66.8% to 565 million won, and the company swung to a net loss of 605 million won, which the source attributes to foreign exchange losses and valuation losses on financial assets. Chips&Media also said it plans to strengthen its position in the mobility market, expand into edge AI fields including robotics and drones, address demand for next-generation video codec standards APV and AV2, commercialize AI ISPs and further enhance its NPU IP.
IP licensingRoyalty revenueService revenueChips&Media, GoogleThe Elec
According to Nikkei, citing industry sources, rising component costs are reportedly prompting leading PC brands including HP, ASUS, and Acer to move part of their production from Thailand and Vietnam back to China, while Dell is also reportedly considering a similar move (reported move, not confirmed as implemented). The stated cause is that surging AI demand drives shortages of memory and storage chips, raising PC bills of materials: per TrendForce, CPU, DRAM, and SSD costs accounted for approximately 68% of a mainstream notebook's BOM in the third quarter of 2026, up from 45% in the first quarter of 2025. The development partially reverses the 'China+1' diversification strategy pursued amid U.S.-China tensions and trade restrictions. TrendForce estimates the share of global notebook production outside China will decline from approximately 24% in 2025 to 21% in 2026, potentially falling below 20% in 2027, and expects global notebook shipments to decline by a low-single-digit percentage in 2027, potentially widening to a high-single-digit rate if elevated DRAM and CPU prices are passed on to consumers. Separately, Quanta reportedly suspended HP notebook production for about a week in September amid a dispute over rising component costs, resuming after further negotiations; servers accounted for over 80% of Quanta's revenue in the second quarter of 2026, and supply chain sources suggest it has gained greater leverage in notebook pricing negotiations. Chinese ODMs (Luxshare, Huaqin Technology, Longcheer Technology) are reportedly offering lower upfront costs, including waiving engineering and tooling fees, and benefit from access to domestically produced memory chips.
memory chipsstorage chipsDRAMHP, ASUS and 11 totalTrendForceCapacity Change
During its 3Q26 earnings call, SK hynix said it plans to maximize the potential of its existing 6F² architecture through process improvements and stable platform operations, while continuing to develop 4F² and 3D DRAM as potential next-generation options, with adoption tied to each technology's maturity and economic viability. According to News 1, SK hynix DRAM marketing head Park Joon-deok said advances in EUV lithography and process scaling offer further room to extend the 6F² platform, stressing that commercializing new cell architectures requires overcoming hurdles in yields, reliability, costs, product design and customer validation. By contrast, Micron has ruled out adopting 4F² DRAM currently, saying the technology is "not on the roadmap right now"; Micron President and Chief Technology and Product Officer Scott DeBoer said more than 20 years of research had failed to identify a sustainable scaling path, and that while technically feasible, the 4F² structure's process complexity and higher manufacturing costs limit its practical benefits. According to Chosun Biz, Samsung Electronics is developing a 4F² architecture based on vertical channel transistors (VCT), and Song Jae-hyuk, President and CTO of Samsung's Device Solutions (DS) division, confirmed the company's 4F² development efforts at SEDEX 2026 in Seoul on October 14. Separately, China's CXMT is pushing ahead with 4F² commercialization plans, aiming to launch its first 4F²-based server DDR5 RDIMM module by the end of 2026. SK hynix is also pursuing 4F² research: in a July blog post tied to VLSI 2026, it positioned 4F² vertical-gate (VG) DRAM as a way to extend scaling at sub-10nm nodes.
DRAM6F² DRAM4F² DRAMSK hynix, Micron and 4 totalTrendForce
Researchers at IBM Research Europe published the paper "Superposed analog memory for vector storage in neural networks" and demonstrated an analog phase-change memory (PCM) architecture that stores multiple AI vectors in superposition, increasing effective storage density with a tunable accuracy tradeoff. Tests on prototype PCM hardware showed inference accuracy close to full-precision software. This is a research demonstration; the source does not state any production, pricing, or supply impact.
phase-change memory (PCM)IBM Research EuropeSemiconductor Engineering
According to a report dated October 27, 2026, Rosenblatt Securities named AMD its top semiconductor pick heading into earnings season, citing strengthening data-center fundamentals and broadening demand despite recent share price declines across the sector. The firm noted that semiconductor stocks with significant data-center revenue exposure declined approximately 25% on average over the past month, while citing strong earnings reports from Penguin Solutions, Micron, TSMC, and Texas Instruments, along with Supermicro's positive preannouncement, as evidence that data-center fundamentals continue to strengthen. Rosenblatt expects TSMC's 2nm capacity to double in 2027, which will support the ramp of AMD's Venice server CPU family; the firm views Venice as the market's highest-performing server CPU, featuring 16 memory channels compared to 12 in the prior generation. AMD CEO Lisa Su recently increased the projected 2030 server CPU total addressable market to $220 billion from $120 billion. The firm said Meta's Muse and other emerging personal AI agents are driving server CPU demand. Rosenblatt's primary concern for data-center growth in 2027 and beyond is supply-chain capacity rather than demand weakness: Lam Research cited near-term supply constraints and Texas Instruments highlighted extended lead times for back-end equipment, but the firm characterizes these as tactical challenges the industry can address rather than evidence of severe product shortages or weakening demand.
semiconductorserver CPU2nm capacityAMD, TSMC and 7 totalYahoo Finance — TXN
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AMD, TSMC, Penguin Solutions, Micron, Texas Instruments, Supermicro, Lam Research
SK hynix reported record 3Q26 results: revenue topped KRW 100 trillion for the first time, reaching KRW 104.62 trillion; operating profit jumped 38% quarter over quarter to a fresh high of KRW 83.33 trillion, pushing its operating margin to a record 80%. Per ZDNet citing FnGuide, analysts had forecast average Q3 revenue of KRW 98.2257 trillion and operating profit of KRW 76.964 trillion, so results exceeded market expectations. Per Yonhap Infomax, DRAM average selling prices (ASPs) climbed by a high-20s percentage quarter over quarter in 3Q26, with roughly 10% shipment growth; NAND ASPs rose by a mid-20s percentage, more than offsetting a slight dip in shipment volumes; server DDR5 sales surged more than 40% sequentially (Chosun Biz). The company has secured long-term supply agreements (LTAs) with 14 major customers, including global cloud service providers (CSPs), up from 10 in 2Q26, and is exploring extensions beyond the typical five-year term with some clients. Existing LTAs already cover more than 50% of its planned production capacity for both 2027 and 2028; per Chosun Biz, with additional customer demand under negotiation, DRAM and HBM output is effectively sold out through 2029; per The Economist Korea, SK hynix expects memory supply shortages to persist through 2030. Per iNews24, the company has finalized negotiations with major customers on 2027 HBM volumes and pricing, with contract terms reflecting HBM4's higher value, and expects the profitability gap between HBM and conventional DRAM to narrow significantly; it projects HBM4 to surpass HBM3E in both shipments and revenue in 4Q26, becoming its flagship HBM product. Amid market speculation that NVIDIA may favor 8-Hi HBM4 over the previously planned 12-Hi HBM4E for Rubin Ultra, CFO Kim Woo-hyun reaffirmed that 12-Hi HBM4 deliveries remain on track with customer-agreed schedules. To respond to surging HBM demand, SK hynix will ramp up M15X to maximum capacity by the end of the year to increase HBM4 production.
On October 20, Starksemi announced that its Micro LED optical interconnect project had completed technical validation by a leading customer and officially entered the product development phase; the solution is based on an 8-inch silicon-based GaN epitaxy platform and hybrid bonding technology, targets high-speed interconnects for AI data centers, and the company will further optimize the design based on customer feedback before proceeding with engineering samples. It previously completed design of experiments (DOE) validation, conducting comparative tests on Micro LEDs ranging from 5μm to 30μm as well as different epitaxial approaches and chip structures. Background: Starksemi was founded in 2022, established operations in Wuhan's East Lake High-Tech Development Zone in October 2024, and in September 2025 completed an 8-inch silicon-based GaN Micro LED pilot production line with a planned annual capacity of approximately 12,000 wafers; in May 2026 it launched a full range of red, green, and blue Micro LED microdisplay panels; in October, a red-and-green stacked microdisplay prototype developed with U.S.-based Inlighten Technologies was showcased at Micro LED-Connect 2026 in Eindhoven, the Netherlands; in September 2026 it raised more than CNY 1 billion in a round led by CATL's Puquan Capital with Meituan Longzhu and Guotai Haitong among participants, bringing cumulative funding to over CNY 2.5 billion.
Micro LED optical interconnectMicro LED microdisplay panelsStarksemi, Inlighten TechnologiesTrendForce
Former Intel CEO Pat Gelsinger is backing Nagare Labs, a memory startup developing Z2RAM. According to The Register, Nagare Labs recently secured US$5 million in seed funding led by Playground Global, where Gelsinger became a partner last year. The company was founded by Georgia Institute of Technology researchers Suman Datta and Shimeng Yu. Z2RAM uses oxide semiconductors and targets SRAM-like speed and DRAM-like density, designed for direct integration on top of logic chips through 3D hybrid bonding and to use standard back-end-of-line (BEOL) processes, allowing multiple memory layers through a single lithography exposure without requiring EUV. The technology remains at the laboratory prototype stage; the startup is seeking an R&D fabrication partner to scale production beyond university cleanroom facilities and plans to sample working Z2RAM memory tiles within four years (a target, not an achieved result), with commercial shipments targeted within the next decade. Z2RAM targets more than five times the bit density of SRAM in its initial implementation, while its capacity would remain far below HBM-equipped accelerators such as NVIDIA's Rubin (288GB) and AMD's MI455X (432GB). Challenges: there is currently no established industry standard for connecting this type of memory to AI accelerators through 3D hybrid bonding, and oxide semiconductors are susceptible to atomic vacancies, so reliability requires further validation.
According to Trendforce, citing supply chain sources and local media, TSMC is weighing raising prices for its Chip on Wafer on Substrate (CoWoS) advanced packaging technology by as much as 20%; TSMC has yet to confirm the report. The reported cause is strained capacity amid AI demand and longer delivery times for chipmaking tools: equipment lead times have reportedly stretched from three to six months to as long as eight months, and TSMC has reportedly placed this year's equipment orders at existing prices instead of negotiating discounts. CoWoS combines logic dies and HBM stacks in a single package; Nvidia's Blackwell already pairs two large GPU dies with eight HBM3E stacks, while the upcoming Rubin and Rubin Ultra are expected to push integration further and increase pressure on packaging. Testing is another bottleneck: Blackwell reportedly takes three to four times longer to test than Hopper, and Rubin could need as much as seven times longer; server CPUs and custom ASICs also compete for advanced packaging capacity. Background: TSMC deputy co-COO Cliff Hou said that by July the company's expected equipment needs had reached 1.9 times its original estimate; earlier this month GlobalFoundries agreed to produce silicon interposers for TSMC's CoWoS in the U.S. under a five-year contract worth $2 billion, with production expected to ramp up in the first half of 2028; TSMC is reportedly also considering broader price increases for 2027, with advanced-process wafer prices expected to rise 5% to 10%, steepest for 2nm and 3nm-class node customers, and customers seeking capacity beyond original allocations facing premiums that could push some costs up by as much as 25%. Industry estimates cited by Trendforce put TSMC's monthly capacity at over 106,000 wafers in 2026, with a target of 227,000 wafers in 2027. If both packaging and wafer price increases materialize, AI hardware costs will likely climb further.
CoWoS先进封装先进制程晶圆硅中介层TSMC, Nvidia and 3 totalTom's HardwarePrice Movement
VDURA CEO Ken Claffey published a blog titled "Long Live the Short King. Now Look One Tier Down" on October 27, 2026, arguing that the SemiAnalysis realization that HBM bandwidth limitations cramp HBM capacity rises beyond 4-hi stacks also applies to NVMe SSDs used in KV Cache tiering, where write bandwidth is more important than capacity. The blog states that HBM 4/4e stacks range from 4-hi to 12-hi in capacity, but the 2,048 pin count is static, so bandwidth is the same regardless of capacity; a PCIe Gen5 x4 NVMe drive gets roughly 14 GB/s read bandwidth whether it is 7.68 TB or 61.44 TB. Citing Kioxia's CD9P PCIe Gen5 TLC SSD as an example, he points out eight times the capacity with identical write bandwidth and nine percent less read bandwidth. The blog also notes SSD terabytes cost 14x disk drive TBs, supplies a formula for the number of SSDs needed, N = R ÷ (d × E), where N is the number of drives, R is the required bandwidth, d is what one SSD delivers, and E is the fraction of d the architecture actually gets through to a client, and outlines a 5-step SSD buying guide: start with bandwidth in both directions, count devices not terabytes, take the smallest drive that gets you to N, check what capacity came along, and put the rest in a hard disk drive capacity tier. He stresses that the fall from flash to disk performance is orders of magnitude, so the capacity tier must be built for throughput, not dollars per terabyte alone. The blog mentions that VDURA's parallel file system with built-in S3 support can ingest data from the SSD tier and scales performance as capacity ramps up.
S2C showcased FPGA prototyping and AI-assisted debugging at the sixth RISC-V Summit China (October 18–20, Shenzhen Convention and Exhibition Center). In its booth demonstration, an Andes Technology AX66-based RISC-V configuration ran Linux KVM on S2C's Prodigy S8-100 FPGA prototyping system, using 55% of the resources available on a single AMD Versal Premium VP1902 FPGA; the source states this demonstration and utilization figure should not be read as measurements of final silicon performance or application throughput. S2C also demonstrated RCF Agent using RTL from the open-source XiangShan RISC-V processor; the agent starts compilation, gathers error messages, and generates an initial analysis, but the demonstration concerned initial analysis only and did not establish that the agent independently resolves every error or replaces engineering review. In the summit's chip design and verification forum, S2C presented "LLM-based RISC-V Virtual Platform & Debug Flow," a proposed workflow combining a virtual platform modeling the processor, memory, buses, interrupt controller, and common peripherals with an LLM-assisted layer that interprets captured debug information; the platform can boot firmware, bootloaders, and operating systems and supports breakpoints, watchpoints, state inspection, and execution tracing. The source does not state the cause (no cause-related event).
RISC-V processorsS2C, Andes Technology and 3 totalSemiWiki
Murata Manufacturing has developed the NCU01 series, an 008004-inch negative temperature coefficient (NTC) thermistor measuring just 0.25 × 0.125 mm, described as the world's smallest. Compared with the company's previous smallest 01005-inch product, the new component reduces mounting area by approximately 60% while maintaining equivalent temperature-sensing performance, with both resistance and B-constant tolerances specified at ±1%. The ultra-compact thermistor targets densely integrated devices including smartphones, wearable electronics, IC packages, and SiP modules, allowing temperature sensors to be placed closer to heat-generating components. Murata plans to begin sample shipments in October 2026, followed by mass production in 2027; the initial lineup will include 100 kΩ and 10 kΩ resistance variants, with additional options introduced progressively.
On October 27, 2026, Rochester Electronics announced continued lifecycle support for Intel x86 processors. Rochester has partnered with Intel for more than 35 years, providing continued support for legacy microcontrollers and microprocessors including the 8051, 8086/8088, 80C186XL, 80C188XL, 80C196KC, and other established devices. Rochester's product replication engineering team has successfully ported the 80C186XL multiple times in response to manufacturing process obsolescence, helping ensure a continued supply path for customers supporting long-life applications; it also established PLCC assembly capabilities at its Newburyport headquarters after the original industry packaging infrastructure became unavailable. Rochester maintains inventory across a broad range of Intel 32-bit and 64-bit x86 processors, supporting more than 280 part numbers and over two million units, with available families including Xeon, Pentium, Core Duo, Celeron, Atom, and legacy 80286, 80386, and 80486 processors. Rochester's Intel offering also includes millions of chipsets and interface devices, complemented by a broad portfolio of memory, logic, and power management products. The source does not state the cause (such as any price or supply-demand change).
Intel x86 processors80518086/8088Rochester Electronics, IntelElectronics SourcingInventory Shift
Per the September 2026 announcement, AnalogAI, a South Korean company specializing in edge AI processors, has selected memBrain SAGE (Synaptic Analog Generative Engine) neuromorphic hardware IP from Silicon Storage Technology (SST), a Microchip subsidiary, for its first real-world edge AI processors, targeting inference with on-device adaptation to changing real-world conditions at a power consumption of one watt or less; the article notes it is early days for AnalogAI's processors, and the source does not state the cause of any price or supply impact. AnalogAI is SST's fourth publicly announced memBrain licensee, following Witmem in February 2022 (low-power speech processing), Intelligent Hardware Korea in September 2023 (analog compute platforms for edge AI, particularly computer vision), the October 2024 announcement by GlobalFoundries, Witmem and Microchip of sampling of Witmem's WTM-8 video processor capable of 8K video at 120 frames per second, and Mythic's March 2026 selection of memBrain technology for its next generation of ultra-low-power analog processing units. The technology is built on SST's embedded SuperFlash memory using established 40nm and 28nm foundry processes; in SST's YOLOv5 comparison example, the aCIM implementation processes 150 frames per second at 3 watts versus the GPU-based implementation's 200 frames per second at 60 watts, or roughly 15 times the energy efficiency (the THUS AI audio chip in Anker's Soundcore Liberty 5 Pro earbuds also uses this technology, with underlying silicon supplied by Witmem).
flash memoryedge AI processorsAnalogAI, Silicon Storage Technology and 3 totalEE JournalPartnership/M&A
On October 21, during GTC Berlin, Nvidia announced several multi-billion-dollar deals with six major supply chain partners — Ibiden, Unimicron, Samsung Electro-Mechanics, SPIL, Amkor and KYEC — across substrates, advanced packaging, semiconductor testing and optical engines, to expand production capacity and reserve capacity for its AI accelerators; expanded supply is to be available from 2027 through 2028, with commitments and production roadmaps stretching through 2028. For substrates, Nvidia plans to secure 2.5x dedicated substrate capacity over the next three years: it earlier signed a deal to provide a multibillion-dollar capacity reservation advance to support Ibiden's Ono Plant in Japan (targeting 3x the plant's current capacity); the Samsung Electro-Mechanics deal will support facility upgrades and new plants in Busan and Sejong, with Nvidia projected to account for a significant portion of its output by 2028; a capacity reservation agreement with Unimicron supports its substrate expansion in Taiwan, expected to start providing capacity by Q2 2027 and reach full capacity by mid-2028. For co-packaged optics, Nvidia signed with SPIL to expand optical engine production capacity 15x (1,400%) by mid-2027, with plans to double again by the end of 2028. With Amkor, Nvidia targets a more-than-300% increase in interposer wafer capacity by the end of 2028 through advanced packaging expansion in South Korea; Amkor confirmed the deal is worth $1.3 billion, bringing Nvidia's total investment across Amkor's Arizona and South Korea facilities to $3 billion. For testing, on October 13 Nvidia signed a deal to pay KYEC $1.1 billion to reserve testing capacity at KYEC's new $1.4 billion U.S. facility (high-volume production slated to begin in April 2027; Singapore high-volume production expected to begin February 2027), with testing capacity expected to double from calendar 2026 to 2027; KYEC currently handles nearly all of Nvidia's chip testing. Per its August 2026 disclosures, Nvidia had accumulated $279 billion in outstanding supply and manufacturing-capacity commitments by July 2026. All expansion figures are announced plans and targets, not yet realized.
substratesadvanced packaginginterposer wafersNvidia, Ibiden and 7 totalTom's HardwareCapacity Change
According to a TrendForce post dated Oct 27, 2026 (reported, unconfirmed), NVIDIA is reportedly reconsidering 12-Hi HBM4E for Rubin Ultra in favor of a mix of 8-Hi HBM4 and HBM4E, which could potentially ease costs and supply constraints. Separately, the chipmaker has quietly cut Rubin GPU's HBM4 bandwidth by nearly 13%. Both items remain reported/conditional claims and are not confirmed as implemented.
Micron has announced that G11 will be its first 3D NAND Flash and is actively working on bringing its next-generation G11 NAND technology to production. Its current G9 technology is shipping across Micron's product portfolio with over 200 layers of scaling; as the current technology reaches its limitations, Micron aims with G11 to use wafer-on-wafer 3D NAND stacking to double the capacity of NAND modules, splitting each wafer into a memory cell wafer and one containing peripheral logic circuits, combined via hybrid bonding technology. Micron plans to ship 400-layer NAND in the second half of 2027. The source also notes that Chinese NAND maker YMTC has been making 3D stacked NAND for some time using Xtacking technology. This is a plan, not an achieved result.
According to a survey published by Memphis Electronic on October 27, 2026, conducted together with EETech and covering more than 100 engineers in North America and Europe, engineers are increasingly choosing memory components based on availability rather than performance or price. 95% of respondents said they had changed their sourcing strategy, their product designs, or both, over the past year; availability was the top concern (69%), followed by pricing (62%) and lead times (46%). The shortage is directly affecting product development: 36% redesigned products around memory components they could reliably obtain, 24% delayed product launches, 11% discontinued products altogether, and 46% reported increased engineering effort. Around 42% have increased inventory planning or safety stock, 39% have qualified alternative memory suppliers, and 27% have moved to older or more readily available memory technologies; legacy products such as DDR3, DDR4 and low-density eMMC were mentioned considerably more often as an expected challenge than leading-edge memory. Only 6% of respondents said they were genuinely confident in forecasting their memory needs over the next twelve months, nearly a third had little or no confidence, and only 13% have signed long-term contracts or supply agreements. Nikolaos Florous, Global Head of Product Marketing at Memphis Electronic, said the impact of supply shortages has already been designed into products, qualification processes and sourcing strategies, and that this is not simply a pricing cycle waiting to be resolved.
South Korean memory chip designer Jeju Semiconductor is struggling to secure enough wafer capacity from Taiwan's Powerchip Semiconductor Manufacturing (PSMC), which is limiting its sales growth. The stated cause is that strong memory demand is driving up prices and manufacturing costs. No specific figures, percentages, or dates are provided, and the source does not state whether PSMC will expand capacity or adjust allocation.