Russian chipmakers demonstrated homegrown RISC-V and Arm chips with retro games at the Microelectronics 26 (ME26) forum in Sochi on October 11, 2026, as reported in an article published October 15, 2026. The demo featured a Baikal Electronics BE-U1000 microcontroller-based NES clone, an Elvis Hypercom-U SoC, and MCST's Elbrus-based PCs. The source does not state the cause. The event status is observed demonstration.
Nvidia unveiled next-generation co-packaged optics (CPO) technology, optics-on-interposer (OOI), at SEMICON West 2026 in San Francisco on Oct. 13. The technology moves optical engines from the organic package substrate onto the interposer carrying computing chips; by eliminating the organic substrate from the electrical signal path, it can increase bandwidth density and reduce power consumption, and Nvidia said it has developed a prototype. Nikola Nedovic, a principal researcher at Nvidia, presented the research. Nvidia also unveiled DWDM technology, demonstrating eight wavelengths operating at 32Gb/s each, delivering 256Gb/s per fiber. Both technologies remain in the research stage; Nedovic said the company is proposing and evaluating technologies for future products while addressing challenges preventing commercialization. Nvidia has already deployed CPO in mass-produced products including Quantum-X Photonics and Spectrum-X Photonics: Quantum-X is used in InfiniBand networks connecting Blackwell Ultra-based GB300 NVL72 racks, while Spectrum-X is deployed in Ethernet switches for the Vera Rubin platform. Nvidia has established a CPO manufacturing ecosystem: TSMC provides its COUPE silicon photonics packaging technology and handles contract manufacturing alongside SPIL; Coherent, Lumentum and Sumitomo Electric manufacture external laser source modules; Corning, Senko, Browave and TFC supply optical fibers and related components; Foxconn and Fabrinet handle cooling and final testing.
According to a Reuters report on October 15, citing two people familiar with the matter, SK Hynix is seeking US approval to ship additional American chipmaking equipment to its NAND flash facility in Dalian, China, linking the request to a potential investment in a new US factory. The matter remains at the approval-seeking stage: the equipment exports are pending US approval and the US factory investment is only a potential plan; the source does not state the cause.
Chinese semiconductor equipment maker AMEC plans to develop 102 new equipment models over the next three to five years, backed by nearly CNY13 billion (approximately US$1.94 billion) in research and development investment, to expand its portfolio beyond plasma etching into thin-film deposition, advanced packaging, inspection and other semiconductor manufacturing processes.
plasma etchingthin-film depositionadvanced packagingAMECDigiTimes Asia
IBM and Siemens have announced a research collaboration to advance IBM's 3D nanostack transistor architecture, targeting the design and manufacturing challenges of future angstrom-scale semiconductors. The partnership will combine IBM's semiconductor research with Siemens' electronic design automation (EDA), simulation and lithography expertise to help move the technology closer to commercial production. This is a research collaboration, with commercial production a goal rather than an achieved result; the source does not state the cause or a specific timeline.
3D nanostack transistor architectureIBM, SiemenseeNews EuropePartnership/M&A
On October 13, Huawei unveiled the detailed architecture of its Kirin 9050 Pro chip for the first time at its Lianqiu Lake research center in Shanghai, outlining advances in LogicFolding and hybrid bonding technologies. Xu Songyu, head of wireless terminal chip product management at Huawei's semiconductor business, said the company now sees a sustainable development path for Kirin processors over the next decade. This is a technology architecture unveiling and roadmap outlook; the source contains no price, capacity or supply-demand data.
Kirin processorsKirin 9050 Pro chipHuaweiDigiTimes Asia
This is an opinion column arguing that 3D memory could redraw chip competition and weaken US sanctions on China. The factual content recalled is: in October 2022, the US Bureau of Industry and Security (BIS) imposed a package of export restrictions on China, including controls on equipment and components for manufacturing 3D NAND with 128 layers or more, and restrictions on support provided by US persons. As an opinion piece, the source does not state specific impacts or subsequent developments.
3D NAND (128 layers or more manufacturing equipment and components)DigiTimes AsiaPolicy/Regulation
ASML reported record third-quarter 2026 sales of €11.7 billion ($13.6 billion), up 25% from the previous quarter, as growing demand for AI chips continues to drive semiconductor equipment investment.
Japan plans to invest up to $21 billion with GlobalFoundries to build two 300mm semiconductor fabs in Malta, New York. An initial investment of approximately $10 billion will accelerate construction of the first 300mm fab, expected to come online in 2029 with an annual capacity of about 900,000 300mm wafers; a second fab would require a further ~$10 billion and provide similar capacity. Together the fabs would add significant new US manufacturing capacity and are expected to create about 27,000 construction and ecosystem jobs and more than 1,000 high-skilled manufacturing jobs in New York’s Capital Region. The investment is part of a US‑Japan deal under which Japan will invest $550 billion in the United States in exchange for the US lowering tariffs on Japanese cars and other imports from at least 25% to 15%. The project remains in the planning stage.
Apple launched the HomeView smart display at its "Welcome Home" event on October 13, priced at US$299. It is scheduled to debut on November 13 in eight countries: the US, the UK, Canada, Australia, New Zealand, India, Singapore, and South Africa. The device features a 7-inch square display and an A18 chip, comes in desktop and wall-mounted versions, and centers on a new Siri AI that Apple positions as a smart voice-control hub for the home.
Synopsys CEO Sassine Ghazi said during the CEO Summit at SEMICON West 2026 that fully autonomous chip development has not yet crossed the final hurdle to become reality, although the company has advanced from AI-assisted engineering to models that coordinate more than 40 task agents. He added that AI-era chip development requires co-optimization across physics, materials, processes, architectures, software, and models.
Samsung Ventures and Applied Ventures, the venture capital arm of Applied Materials, have invested in US-based Flexcompute, backing simulation technology designed to predict semiconductor packaging deformation before manufacturing. The source does not state the investment amount or funding round. The investment comes as increasingly complex AI chips create new challenges in managing thermal stress, warpage, and manufacturing yields. The event is the completed investment; it involves no capacity or price change.
GlobalFoundries has reached a multiyear manufacturing agreement with TSMC to expand silicon interposer capacity at its Malta fab in New York, supplying TSMC's Chip-on-Wafer-on-Substrate (CoWoS) advanced-packaging ecosystem. The agreement is expected to be worth US$2 billion over an initial five-year term.
South Korea's LX Semicon is seeking buyers for more than 60 silicon carbide (SiC) power semiconductor patents as it winds down a business it entered five years ago to reduce its reliance on display driver ICs (DDIs). According to the source, the retreat comes as Taiwan's Novatek gains ground in LX Semicon's core display chip market, increasing pressure on the company to develop new revenue sources. The patent sale is at the stage of seeking buyers and has not been confirmed as completed.
The source states that rising complexity in AI chip manufacturing is creating new opportunities for semiconductor equipment suppliers. Applied Materials says rising transistor counts, denser interconnects, and more advanced memory architectures are expanding demand across logic, DRAM, and high-bandwidth memory (HBM) manufacturing. No specific figures, dates, or price movements are given; this is background industry information.
logicDRAMhigh-bandwidth memory (HBM)Applied MaterialsDigiTimes Asia
According to EE Times Asia, in the context of SEMICON West 2026, NVIDIA and industry partners are applying accelerated computing and AI agents to chip simulation, process optimization, inspection and fab automation, and NVIDIA is expanding its GPU libraries for AI-driven semiconductor manufacturing accordingly. The source does not specify product names, timelines or quantitative data; this is an industry technology update with no direct price impact for procurement or trading.
Chinese tech firms have reportedly bought over 1M NVIDIA gaming and workstation GPUs for AI; the claim is reported as hearsay and the source does not state the cause. At the same time, domestic chip output is said to have more than doubled this year, reportedly driven by Huawei, Alibaba, Baidu, and Cambricon. The item is a TrendForce repost of RT NEWS, and both claims remain reportedly/said-to-be statements that are not confirmed in the source.
NVIDIA gaming and workstation GPUsdomestic AI chipsNVIDIA, Huawei and 5 totalTrendForce Official (Market Data)
GlobalFoundries has won a US$21 billion US-Japan deal to build and operate two new fabs in New York, under an arrangement where governments own the factory and tools and pay GlobalFoundries to build and run them, adding capacity without a capital bill for the company; for Japan, the deal channels part of its US$550 billion US investment pledge into supply for Japanese chipmakers and work for Japanese toolmakers; for Taiwan's mature-node foundries, it creates a large state-backed source of capacity on US soil in the segment where they are expected to benefit from customers' supply-chain diversification; the source does not state the cause.
Reported on October 15, 2026: TSMC CEO C.C. Wei highlighted the company's ability to mass-produce 5x reticle-size packaging with strong yields, a feat he says rivals have yet to match, and signaled TSMC could step in if rival providers, including Intel's EMIB, struggle to meet customer demand. TSMC is doubling down on advanced packaging despite its own CoWoS capacity constraints, with 9x solutions under development and 14x on the horizon. According to an Anue report in August, TSMC Vice President of Advanced Packaging Technology and Service Jun He said the company's 5.5x reticle-size CoWoS technology has already entered high-volume production, with yields exceeding 98% for multiple AI customers and reaching as high as 99% for some; advancing one generation per year, TSMC expects to scale up to 14x reticle-size packaging by 2029, according to Anue. Wei also reportedly expects the next-generation A14 (1.4nm-class) process to become larger than N2 on stronger customer engagement, slated for risk production in 2027 and high-volume manufacturing in 2028. Intel is reportedly accelerating its 14A roadmap: CEO Lip-Bu Tan is reportedly targeting risk production as early as 1Q27, while Intel's official timeline remains more conservative, with internal 14A products planned for 2H27 and high-volume manufacturing in 2028. According to a July TechPowerUp report citing KeyBanc, Intel reportedly plans to manufacture 80–90% of its upcoming Nova Lake compute tiles internally, reversing an earlier dual-source strategy under which TSMC's N2 process was expected to handle 60–70% and Intel's 18A the rest. Wei stressed that the foundry treats all customers equally, whether IDMs or fabless designers, while factoring their internal manufacturing capacity into its own capacity planning.
Fujifilm is expanding semiconductor materials production in Arizona (US); the source states the cause is rising global chip demand, especially for artificial intelligence, advanced logic, and memory. The move aims to strengthen supply for makers in the US and beyond, while supporting new packaging technologies and faster commercialization worldwide. The source gives no specific scale, investment amount, or timeline, and the expansion remains a planned capacity increase.