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INA240-Q1

Current-sense amplifier with enhanced PWM rejection

Measures shunt drops at −4V to 80V common mode, useful in PWM current sensing. It is not isolated or a direct high-voltage traction-pack sensor. Ordering must distinguish gain options and Grade 0/1 variants.

AutomotiveActiveExample package: SOIC (D) · 8 pinVerified 2026-11-06
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5-second verdict

AutomotiveAEC-Q100 Grade 0 / Grade 1 (OPN dependent)
Temperature−40°C to +125°C / +150°C (TA; OPN dependent)
Functional safetyFunctional Safety-Capable
LifecycleActive
In one sentence: Qualification is grounded in this TI product's documentation; no grade is inferred from temperature. An ordering table may show junction or variant-specific limits, which must be distinguished from ambient conditions. TI explicitly lists Functional Safety-Capable. This is a device-documentation category, not system ASIL certification; assess the exact function, assumptions and safety manual.

Key specifications

Common-mode range−4–80 V
Supply2.7–5.5 V
Gain options20 / 50 / 100 / 200 V/V
Input offset (25°C maximum)±25 µV; VS=5 V, VCM=12 V
Gain error (25°C maximum)0.20%; VOUT: GND+50 mV to VS−200 mV
Gain selectionA1 / A2 / A3 / A4: exact OPN required

Orderable variants (OPNs)

The GPN is for selection; the full OPN is for ordering. These examples were observed on the verification date, not live stock. Variants may differ in package, temperature, gain/threshold and, for PMICs, NVM/sequencing. Distinguish TA from TJ in the exact datasheet.

OPNPackageTemperatureNote
INA240A1EDRQ1SOIC (D) · 8 pin-40 to +150°C (TI OPN listing; verify TA/TJ)Verify exact OPN, temperature definition and revision; not a stock claim.
INA240A1QDRQ1SOIC (D) · 8 pin-40 to +125°C (TI OPN listing; verify TA/TJ)Verify exact OPN, temperature definition and revision; not a stock claim.
INA240A1QPWRQ1TSSOP (PW) · 8 pin-40 to +125°C (TI OPN listing; verify TA/TJ)Verify exact OPN, temperature definition and revision; not a stock claim.
INA240A2EDRQ1SOIC (D) · 8 pin-40 to +150°C (TI OPN listing; verify TA/TJ)Verify exact OPN, temperature definition and revision; not a stock claim.
INA240A2QDRQ1SOIC (D) · 8 pin-40 to +125°C (TI OPN listing; verify TA/TJ)Verify exact OPN, temperature definition and revision; not a stock claim.
INA240A2QPWRQ1TSSOP (PW) · 8 pin-40 to +125°C (TI OPN listing; verify TA/TJ)Verify exact OPN, temperature definition and revision; not a stock claim.
INA240A3EDRQ1SOIC (D) · 8 pin-40 to +150°C (TI OPN listing; verify TA/TJ)Verify exact OPN, temperature definition and revision; not a stock claim.
INA240A3QDRQ1SOIC (D) · 8 pin-40 to +125°C (TI OPN listing; verify TA/TJ)Verify exact OPN, temperature definition and revision; not a stock claim.
INA240A1EDRQ1-40 to +150°C (TI OPN listing; verify TA/TJ)
SOIC (D) · 8 pinVerify exact OPN, temperature definition and revision; not a stock claim.
INA240A1QDRQ1-40 to +125°C (TI OPN listing; verify TA/TJ)
SOIC (D) · 8 pinVerify exact OPN, temperature definition and revision; not a stock claim.
INA240A1QPWRQ1-40 to +125°C (TI OPN listing; verify TA/TJ)
TSSOP (PW) · 8 pinVerify exact OPN, temperature definition and revision; not a stock claim.
INA240A2EDRQ1-40 to +150°C (TI OPN listing; verify TA/TJ)
SOIC (D) · 8 pinVerify exact OPN, temperature definition and revision; not a stock claim.
INA240A2QDRQ1-40 to +125°C (TI OPN listing; verify TA/TJ)
SOIC (D) · 8 pinVerify exact OPN, temperature definition and revision; not a stock claim.
INA240A2QPWRQ1-40 to +125°C (TI OPN listing; verify TA/TJ)
TSSOP (PW) · 8 pinVerify exact OPN, temperature definition and revision; not a stock claim.
INA240A3EDRQ1-40 to +150°C (TI OPN listing; verify TA/TJ)
SOIC (D) · 8 pinVerify exact OPN, temperature definition and revision; not a stock claim.
INA240A3QDRQ1-40 to +125°C (TI OPN listing; verify TA/TJ)
SOIC (D) · 8 pinVerify exact OPN, temperature definition and revision; not a stock claim.

Official ordering page: https://www.ti.com/product/INA240-Q1

Typical applications

PWM motor/solenoid current sensingHigh-/low-side shunt sensing within common-mode limits

FAQ

Why do OPN temperature ranges differ?

TI lists Grade 1 (−40 to125°C) and Grade 0 (−40 to150°C) variants. Do not combine maximum temperature, package and gain into a nonexistent OPN.

Does 80V common mode permit an 800V pack?

No. Shunt terminals relative to amplifier reference ground must remain within allowed limits; HV domains require a separate isolation and safety architecture.

How should I verify the INA240-Q1 orderable?

The page lists 8 OPN examples from official material checked on 2026-11-06. Match package, function options and temperature definitions; obtain live price/stock from TI or authorized distributors.

Sources and verification

Related selection and design checks

NuAxi is an independent semiconductor market-intelligence platform and is not affiliated with Texas Instruments. Information is for selection reference only and is not a design, certification or procurement guarantee; verify against TI's official datasheet, ordering page and terms.

INA240-Q1: Current-sense amplifier with enhanced PWM rejection — AEC-Q100, OPNs, alternates | NuAxi