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TPS6594-Q1 / LP8764-Q1: OPN, NVM and power-sequence checklist
A joint engineering/procurement checklist for exact PMIC orderables, default voltages, phases, startup sequence and fault behavior. Same family or package does not establish identical NVM, and suffixes are not a configuration decoder.
Sources reviewed 2026-11-06 · NuAxi technical editorial · source facts and engineering interpretation distinguished
Key answer
Split 'correct part' into three records: device/package, configuration documentation for the full OPN, and board-level validation. NVM-controlled startup can occur before the MCU communicates; later register writes cannot be assumed to rescue incorrect defaults.
Distinguish the two devices' rail resources
TPS6594-Q1 provides five bucks and four LDOs. LP8764-Q1 has four buck cores in configurable phase arrangements, without the same LDO set. Both can serve processor power, but this does not make them substitutes.
Scroll wide tables horizontally; column headers remain visible within the table.
| Check | TPS6594-Q1 | LP8764-Q1 |
|---|---|---|
| Regulator resources | 5 bucks +4 LDOs | 4 buck cores, no LDO |
| Multiphase current context | Four configurable bucks; up to14A on one rail, subject to conditions | 5A/phase; up to20A with four phases, subject to conditions |
| Configuration/sequencing | NVM sequencing and register settings | Phase configuration, interface and synchronization must match OPN |
| Package | 56-pin RWE | 32-pin RQK |
| Functional-safety material | Compliant; not system certification | Compliant; not system certification |
Link OPN, configuration document and BOM
A GPN finds the family; procurement needs the full OPN. TPS65941212RWERQ1 and LP876411B4RQKRQ1 are ordering examples, not recommendations for a particular processor board. This guide does not decode NVM content from middle digits.
For each candidate, record the configuration document/revision, intended rail voltages/phases, interface addresses/modes, GPIO functions and fault responses. Without the document for that OPN, mark it unconfirmed rather than assuming family-wide defaults.
Validate defaults before MCU intervention
The PMIC must power the processor before code can run and access the bus. Default outputs, order, reset release and fault handling cannot all rely on later software correction. Capture critical rails, PGOOD/reset and enable signals and compare them with processor sequencing requirements.
Runtime I²C/SPI settings and persistent NVM programming are different operations. Do not assume a register write survives a power cycle. Confirm programming access, limits and tools from the specific configuration material.
Include procurement substitutions in acceptance
This is a design-review checklist, not a compatibility guarantee for an untested OPN. Matching packaging, pin count and maximum current does not establish configuration or board behavior.
- Use full OPNs in the BOM; approved-alternate records include the configuration revision, not only the GPN.
- Review voltage, sustained/peak current, phase grouping, PGOOD and reset-release timing for each rail.
- Test power cycling, brownout, thermal shutdown, watchdog failure and communication-fault transitions.
- Bind results to board revision, firmware, OPN, configuration document and measurement conditions.
- Pause substitution when NVM documentation or default behavior is unresolved, rather than changing marketing wording.
Frequently asked questions
Can a different OPN within one GPN be a procurement-only change?
Do not assume so. Establish whether the difference is only shipping packaging or also configuration, temperature or package, using official evidence. Default sequencing/function changes need engineering and software review.
Does this page provide an NVM map for every OPN?
No. This guide provides a verification process, not unverified configuration maps. Obtain OPN-specific defaults from TI configuration documents and validate them on hardware.
Related parts and complete OPNs
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NuAxi is independent of TI. This guide organizes official evidence and engineering checks; it is not substitution approval, system certification, procurement assurance or completed design validation. Review the exact OPN, datasheet revision and project requirements.