Silanna Targets Edge AI with High-Performance Compact ADCs

What happened

Silanna has launched the Plural Nano family of high-performance analog-to-digital converters (ADCs) for Edge AI and other applications with limited PCB space. The devices offer resolutions from 12 to 16 bits and sampling rates from 5 to 250 Msps in compact 64-ball BGA packages. The family includes two package options: a 3.4 × 3.4 mm version supporting single- and dual-channel 12-bit configurations as well as single-channel 14- and 16-bit devices, and a larger 3.7 × 3.7 mm package accommodating dual-channel 14- and 16-bit variants. According to Silanna, competing ADCs operating above 125 Msps are almost universally housed in packages of at least 9 × 9 mm; against these, the two Plural Nano package variants reduce footprint by 83% and 86% respectively, and against competing 125 Msps converters typically measuring at least 5 × 5 mm, the reductions reach 45% and 54%. Plural Nano shares the proprietary factory-configurable architecture of Silanna's original Plural ADC family, letting teams establish specific product configurations (SKUs) after fabrication. At launch, 90 ADC configurations covering 12-, 14-, and 16-bit resolutions will be available, and Silanna plans to announce additional resolutions and features later in 2026. The devices integrate reference and clock-management circuitry, support LVDS and CMOS outputs, and operate from -40°C to +85°C; ADCs and evaluation kits are available through Silanna's authorized distributor network.

Impact and signal

Affected components and suppliers

Source and time

Source: Power Electronics News · 11/6/2026 · View original source