Taiwanese startup Skymizer has formally announced a strategic partnership with Egis Technology to develop Flow (T12), a new-generation AI inference chip. Fabricated on TSMC's 12nm node and paired with LPDDR5 memory, the solution requires just three PCIe cards and 750W of power to run 3-trillion-parameter large language models (LLMs), representing roughly one-tenth the power consumption of a comparable Nvidia H100 deployment. Chip development is part of the announced partnership plan; the source does not state a production or delivery timeline.
AI inference chip (Flow T12, 12nm)Skymizer, Egis Technology and 3 totalDigiTimes AsiaPartnership/M&A
Silicon Valley venture capital firm Playground Global returned to Taiwan with six portfolio companies spanning memory, power management, optical communications and advanced packaging, showcasing technology breakthroughs and expansion plans aimed at easing AI computing bottlenecks. Its newest portfolio companies also made their Taiwan debut. The source states only a showcase and expansion plans, with no specific capacity figures, timelines or price data; whether the expansions are implemented remains a plan.
US materials giant 3M recently entered into a strategic partnership with Taiwanese optical component manufacturer Genius Electronic Optical (GSEO), with plans to acquire a 4.7% stake in the company through a private placement. The two companies aim to accelerate technology development and expand manufacturing capacity for expanded beam optics (EBO). The stake acquisition and capacity expansion remain plans/goals; the source does not state the deal value, timeline, or completion conditions.
According to a 2026-10-28 report citing Reuters sources, CXMT's HBM3E yields currently stand at just 20% to 30%, well below the approximately 70% achieved by SK hynix. CXMT has reportedly delivered HBM3E samples to several domestic AI chip designers and expects to begin limited production within the next two months (planned, not yet implemented). It has provided customers with two versions: a standard design and a revised version incorporating changes aimed at improving manufacturing yields. Because a significant portion of chips must be discarded or reworked, low yields are expected to make CXMT's HBM3E more expensive to produce than comparable products from overseas competitors. CXMT reportedly began developing HBM technology internally as early as 2024. Testing cited by Reuters showed CXMT's HBM3E performed closer to SK hynix's previous-generation HBM3 than to its HBM3E, highlighting the technological gap with SK hynix, Samsung Electronics, and Micron. The report also notes China's shortage of advanced AI memory: Reuters noted in September that Huawei, Cambricon, MetaX, and Iluvatar CoreX had reportedly raised prices for current and next-generation AI chips by 20% to 50%, and Chinese chipmakers have increasingly relied on costly grey-market HBM supplies following tighter U.S. export restrictions. Per Seoul Economic Daily in September, citing The Information, Alibaba's chip design unit T-Head and Cambricon Technology were reportedly testing the memory; if development proceeds as planned, products incorporating CXMT's HBM3E could reach the market as early as 2027. Per Southern Metropolis Daily, CXMT management did not directly address the technology at a September investor briefing, saying only it would continue developing products and processes according to its existing roadmap; an analyst noted it remained unclear whether samples could meet domestic customers' requirements or how soon stable, large-scale production could be achieved.
On October 28, 2026, SK hynix announced its third-quarter 2026 results: Q3 revenues of 104.6155 trillion won, operating profit of 83.3338 trillion won (80% operating margin) and net profit of 39.7756 trillion won (38% net margin), all-time-high quarterly results in both revenue and operating profit, with quarterly revenue surpassing 100 trillion won for the first time; revenue and operating profit rose 32% and 38% from the previous quarter, respectively (Q2 2026: revenue of 79.3187 trillion won, operating profit of 60.5426 trillion won), revenue up 328% year-over-year (3Q25: 24,448.9 billion KRW), operating profit up 632% YoY, and net income down 58% QoQ and up 216% YoY. The company attributed the results to rising prices of key products on growing demand for AI memory and expanded sales of HBM4 and high-value-added server products. It expects HBM4 to surpass HBM3E in both shipment volume and revenue in the fourth quarter and become a mainstream product (a forecast, not an actual result), and projects that the structure in which demand exceeds supply will persist through 2030 (company projection). The company plans to ramp up M15X to maximum capacity by the end of the year to increase HBM4 production and to raise the ratio of its 321-layer process to more than half of its domestic production capacity in the fourth quarter; it has signed LTAs with 14 major customers including leading global cloud service providers, with secured LTA volume corresponding to more than 50% of total production capacity for 2027 and 2028. The company announced shareholder returns totaling approximately 100 trillion won for fiscal year 2026 (comprising cash dividends of 30 trillion won or more and share repurchases and cancellations of 60 trillion won or more, including the 40 trillion won announced in August, which was completed last week); the Board resolved on a third-quarter cash dividend of 14 trillion won and a 20 trillion won share repurchase, with a quarterly dividend of 20,000 won per share (a 10,000-won dividend on improved earnings and a 10,000-won special dividend sharing Kioxia investment gains), and investment is expected to increase significantly next year with Yongin Phase 1 entering full-scale operation.
UMC and AP Memory announced a collaboration on silicon capacitor technology, combining deep trench capacitor technology and silicon capacitor designs for advanced packaging power delivery in AI and HPC systems. The source does not state a specific timeline, capacity, or commercial terms. This is an announced collaboration; its actual implementation is not confirmed by the source.
silicon capacitordeep trench capacitorUMC, AP MemoryEE Times AsiaPartnership/M&A
According to information obtained on Oct. 27, Lee Cheong, president and CEO of Samsung Display, reportedly met with a senior executive from US equipment maker Applied Materials last week. Industry observers believe the two sides may have discussed organic light-emitting diode (OLED) technology that does not use fine metal masks (FMMs), as well as related deposition equipment. The meeting has drawn attention because Samsung Display is actively pursuing non-FMM technology development: the company launched its proprietary Micro Patterned OLED (MPO) development project in March 2026 and is currently working on a 7-inch engineering sample (ES), aiming to produce a prototype as early as the end of 2026. Non-FMM technology forms red, green and blue (RGB) OLED pixels without using fine metal masks; a representative approach involves depositing organic materials across the entire substrate and then defining pixel patterns through photolithography and etching, similar to semiconductor manufacturing processes. Eliminating the area occupied by masks increases the aperture ratio, improving brightness and lifespan at the same current level; the technology also makes design changes easier because new masks are not required for each product, and for small displays it is considered particularly suitable for high-mix, low-volume production. Samsung Display installed a Generation 5.5 full-substrate vertical deposition system from AKT, an Applied Materials subsidiary, at its A2 production line in Asan, South Chungcheong Province, in September 2025. Applied Materials announced in November 2024 that it would supply Samsung Display with equipment to evaluate its proprietary non-FMM technology, MAX OLED; the equipment was reportedly delivered under a conditional purchase order (CPO), which converts into a firm order if the system meets agreed performance criteria within the evaluation period. In addition, China's Visionox previously decided to adopt its proprietary non-FMM process, ViP, for its Generation 8.6 OLED production line and selected Applied Materials as its deposition equipment supplier.
Intel announced on Oct. 26 local time that it had signed a definitive agreement to acquire quantum computing software company Classiq, to build a full-stack quantum computing platform integrating hardware and development tools. Classiq has developed an integrated software platform independent of specific qubit technologies or hardware architectures; when users provide instructions, the platform automatically designs quantum circuits optimized for the qubit characteristics of each hardware system, serving a role similar to EDA tools used in semiconductor circuit design. Intel plans to combine its proprietary spin-qubit manufacturing technology with Classiq's platform to create a user-friendly full-stack quantum computing system, aiming to accelerate the commercialization of quantum processing units (QPUs) usable in practical applications and to expand its product portfolio beyond CPUs, GPUs and ASICs to include QPUs. The acquisition is expected to close in the first half of 2027, subject to approval from US regulators and other procedures; until then the two companies will continue operating independently. Following the acquisition, Classiq will continue supporting quantum hardware and qubit technologies from other manufacturers. Intel has invested in quantum computing R&D since 2015 and can mass-produce spin-qubit chips and cryogenic control electronics using the same lithography and etching equipment and processes employed in conventional silicon semiconductor production lines.
quantum computing software platformspin-qubit chipscryogenic control electronicsIntel, ClassiqThe ElecPartnership/M&A
According to Nikkei, citing industry sources, rising component costs are reportedly prompting leading PC brands including HP, ASUS, and Acer to move part of their production from Thailand and Vietnam back to China, while Dell is also reportedly considering a similar move (reported move, not confirmed as implemented). The stated cause is that surging AI demand drives shortages of memory and storage chips, raising PC bills of materials: per TrendForce, CPU, DRAM, and SSD costs accounted for approximately 68% of a mainstream notebook's BOM in the third quarter of 2026, up from 45% in the first quarter of 2025. The development partially reverses the 'China+1' diversification strategy pursued amid U.S.-China tensions and trade restrictions. TrendForce estimates the share of global notebook production outside China will decline from approximately 24% in 2025 to 21% in 2026, potentially falling below 20% in 2027, and expects global notebook shipments to decline by a low-single-digit percentage in 2027, potentially widening to a high-single-digit rate if elevated DRAM and CPU prices are passed on to consumers. Separately, Quanta reportedly suspended HP notebook production for about a week in September amid a dispute over rising component costs, resuming after further negotiations; servers accounted for over 80% of Quanta's revenue in the second quarter of 2026, and supply chain sources suggest it has gained greater leverage in notebook pricing negotiations. Chinese ODMs (Luxshare, Huaqin Technology, Longcheer Technology) are reportedly offering lower upfront costs, including waiving engineering and tooling fees, and benefit from access to domestically produced memory chips.
memory chipsstorage chipsDRAMHP, ASUS and 11 totalTrendForceCapacity Change
During its 3Q26 earnings call, SK hynix said it plans to maximize the potential of its existing 6F² architecture through process improvements and stable platform operations, while continuing to develop 4F² and 3D DRAM as potential next-generation options, with adoption tied to each technology's maturity and economic viability. According to News 1, SK hynix DRAM marketing head Park Joon-deok said advances in EUV lithography and process scaling offer further room to extend the 6F² platform, stressing that commercializing new cell architectures requires overcoming hurdles in yields, reliability, costs, product design and customer validation. By contrast, Micron has ruled out adopting 4F² DRAM currently, saying the technology is "not on the roadmap right now"; Micron President and Chief Technology and Product Officer Scott DeBoer said more than 20 years of research had failed to identify a sustainable scaling path, and that while technically feasible, the 4F² structure's process complexity and higher manufacturing costs limit its practical benefits. According to Chosun Biz, Samsung Electronics is developing a 4F² architecture based on vertical channel transistors (VCT), and Song Jae-hyuk, President and CTO of Samsung's Device Solutions (DS) division, confirmed the company's 4F² development efforts at SEDEX 2026 in Seoul on October 14. Separately, China's CXMT is pushing ahead with 4F² commercialization plans, aiming to launch its first 4F²-based server DDR5 RDIMM module by the end of 2026. SK hynix is also pursuing 4F² research: in a July blog post tied to VLSI 2026, it positioned 4F² vertical-gate (VG) DRAM as a way to extend scaling at sub-10nm nodes.
DRAM6F² DRAM4F² DRAMSK hynix, Micron and 4 totalTrendForce
On October 20, Starksemi announced that its Micro LED optical interconnect project had completed technical validation by a leading customer and officially entered the product development phase; the solution is based on an 8-inch silicon-based GaN epitaxy platform and hybrid bonding technology, targets high-speed interconnects for AI data centers, and the company will further optimize the design based on customer feedback before proceeding with engineering samples. It previously completed design of experiments (DOE) validation, conducting comparative tests on Micro LEDs ranging from 5μm to 30μm as well as different epitaxial approaches and chip structures. Background: Starksemi was founded in 2022, established operations in Wuhan's East Lake High-Tech Development Zone in October 2024, and in September 2025 completed an 8-inch silicon-based GaN Micro LED pilot production line with a planned annual capacity of approximately 12,000 wafers; in May 2026 it launched a full range of red, green, and blue Micro LED microdisplay panels; in October, a red-and-green stacked microdisplay prototype developed with U.S.-based Inlighten Technologies was showcased at Micro LED-Connect 2026 in Eindhoven, the Netherlands; in September 2026 it raised more than CNY 1 billion in a round led by CATL's Puquan Capital with Meituan Longzhu and Guotai Haitong among participants, bringing cumulative funding to over CNY 2.5 billion.
Micro LED optical interconnectMicro LED microdisplay panelsStarksemi, Inlighten TechnologiesTrendForce
Former Intel CEO Pat Gelsinger is backing Nagare Labs, a memory startup developing Z2RAM. According to The Register, Nagare Labs recently secured US$5 million in seed funding led by Playground Global, where Gelsinger became a partner last year. The company was founded by Georgia Institute of Technology researchers Suman Datta and Shimeng Yu. Z2RAM uses oxide semiconductors and targets SRAM-like speed and DRAM-like density, designed for direct integration on top of logic chips through 3D hybrid bonding and to use standard back-end-of-line (BEOL) processes, allowing multiple memory layers through a single lithography exposure without requiring EUV. The technology remains at the laboratory prototype stage; the startup is seeking an R&D fabrication partner to scale production beyond university cleanroom facilities and plans to sample working Z2RAM memory tiles within four years (a target, not an achieved result), with commercial shipments targeted within the next decade. Z2RAM targets more than five times the bit density of SRAM in its initial implementation, while its capacity would remain far below HBM-equipped accelerators such as NVIDIA's Rubin (288GB) and AMD's MI455X (432GB). Challenges: there is currently no established industry standard for connecting this type of memory to AI accelerators through 3D hybrid bonding, and oxide semiconductors are susceptible to atomic vacancies, so reliability requires further validation.
Power Integrations is expanding its CAPZero family of X-capacitor discharge ICs with the fourth-generation CAPZero-4 device, for industrial and consumer applications. The device reduces system no-load and standby input power by up to 1000 mW, consumes less than 1 mW to support zero-watt no-load operation, operates from -40°C to 125°C, meets IEC 60335 X-capacitor discharge of <34 V in <1 sec, covers X capacitor values from 100 nF to 6 mF, features 900 V internal MOSFETs, and is NEMKO and CB certified. It is pin-to-pin and package compatible with previous CAPZero devices, allowing adoption without redesign. According to the company, the device is in production and shipping to customers.
According to Trendforce, citing supply chain sources and local media, TSMC is weighing raising prices for its Chip on Wafer on Substrate (CoWoS) advanced packaging technology by as much as 20%; TSMC has yet to confirm the report. The reported cause is strained capacity amid AI demand and longer delivery times for chipmaking tools: equipment lead times have reportedly stretched from three to six months to as long as eight months, and TSMC has reportedly placed this year's equipment orders at existing prices instead of negotiating discounts. CoWoS combines logic dies and HBM stacks in a single package; Nvidia's Blackwell already pairs two large GPU dies with eight HBM3E stacks, while the upcoming Rubin and Rubin Ultra are expected to push integration further and increase pressure on packaging. Testing is another bottleneck: Blackwell reportedly takes three to four times longer to test than Hopper, and Rubin could need as much as seven times longer; server CPUs and custom ASICs also compete for advanced packaging capacity. Background: TSMC deputy co-COO Cliff Hou said that by July the company's expected equipment needs had reached 1.9 times its original estimate; earlier this month GlobalFoundries agreed to produce silicon interposers for TSMC's CoWoS in the U.S. under a five-year contract worth $2 billion, with production expected to ramp up in the first half of 2028; TSMC is reportedly also considering broader price increases for 2027, with advanced-process wafer prices expected to rise 5% to 10%, steepest for 2nm and 3nm-class node customers, and customers seeking capacity beyond original allocations facing premiums that could push some costs up by as much as 25%. Industry estimates cited by Trendforce put TSMC's monthly capacity at over 106,000 wafers in 2026, with a target of 227,000 wafers in 2027. If both packaging and wafer price increases materialize, AI hardware costs will likely climb further.
CoWoS先进封装先进制程晶圆硅中介层TSMC, Nvidia and 3 totalTom's HardwarePrice Movement
Volkswagen Group has chosen NXP as a strategic technology partner for its future zonal vehicle architecture, with NXP's S32K5 family of microcontrollers serving as a common building block across all the group's brands and vehicle segments, and the first vehicle using the new architecture planned for 2027. The architecture was developed by RV Tech, Volkswagen's joint venture with Rivian, and will be used in both companies' vehicles. NXP's microcontrollers will be the core processors in the zonal controllers, connecting sensors and actuators in different parts of the vehicle and managing functions such as lighting, body, comfort, chassis and safety systems, while heavier computing such as automated driving and infotainment is handled by separate central high-performance processors. The partnership is part of Volkswagen's wider semiconductor strategy, which relies on direct, long-term partnerships with chipmakers to secure supply. The companies have not disclosed volumes or the value of the agreement.
microcontrollerszonal controllersNXP, Volkswagen Group and 4 totalEvertiqPartnership/M&A
Power Integrations (NASDAQ: POWI) introduced CAPZero-4, the fourth generation of its CAPZero™ family of X-capacitor discharge ICs, for industrial and consumer applications. The device reduces system no-load and standby input power by up to 1000 mW – critical when total system standby power requirements can be as low as 300 mW – while consuming less than 1 mW itself to support zero-watt no-load operation, and it features an operating temperature range of -40 deg. C to 125 deg. C for demanding outdoor industrial applications. CAPZero-4 is pin-to-pin and package compatible with CAPZero-3, allowing adoption without redesign, and supports AC-DC converters with line-to-neutral input capacitance between 100 nF and 6 μF, suiting appliances requiring ErP Lot 6 compliance and adapters requiring ultralow no-load consumption (less than 300 mW). Key features include ultra-low power consumption below 0.75 mW at 230 VAC, extended -40 deg. C to 125 deg. C operating temperature, drop-in replacement via package and pin compatibility with CAPZero-3, and compliance with IEC 60335, EN/IEC 62368-1 (NEMKO), UL 62368-1, and GB 4943.1 (CQC) safety standards. Since introducing the technology in 2010, Power Integrations has shipped more than one billion CAPZero ICs.
CAPZero-4 X-capacitor discharge ICsCAPZero family X-capacitor discharge ICsPower IntegrationsEE Journal
Reuters reported that Microsoft is launching a voluntary buyout program that could be available to as many as 60,000 employees, covering more than a quarter of its global workforce. Eligible employees span multiple divisions, including teams developing AI solutions, Copilot, Windows and devices, as well as finance, human resources and Xbox; the offer applies to eligible employees in participating teams in Canada, India, the United Kingdom and the United States at level 70 and below, as Microsoft said on Monday (October 27, 2026). Microsoft Chief People Officer Amy Coleman wrote in an internal memo that the offer gives eligible employees a new choice to transition outside the company with support. Microsoft forecasts capital expenditure of $175 billion for the full year 2026, primarily for artificial intelligence infrastructure, and the buyout program is intended to help reduce operating costs while freeing up resources for further technology investments. According to Microsoft's annual report, the company employed 223,000 full-time employees worldwide as of June 30, 2026, and not all eligible employees are expected to accept the offer.
S2C showcased FPGA prototyping and AI-assisted debugging at the sixth RISC-V Summit China (October 18–20, Shenzhen Convention and Exhibition Center). In its booth demonstration, an Andes Technology AX66-based RISC-V configuration ran Linux KVM on S2C's Prodigy S8-100 FPGA prototyping system, using 55% of the resources available on a single AMD Versal Premium VP1902 FPGA; the source states this demonstration and utilization figure should not be read as measurements of final silicon performance or application throughput. S2C also demonstrated RCF Agent using RTL from the open-source XiangShan RISC-V processor; the agent starts compilation, gathers error messages, and generates an initial analysis, but the demonstration concerned initial analysis only and did not establish that the agent independently resolves every error or replaces engineering review. In the summit's chip design and verification forum, S2C presented "LLM-based RISC-V Virtual Platform & Debug Flow," a proposed workflow combining a virtual platform modeling the processor, memory, buses, interrupt controller, and common peripherals with an LLM-assisted layer that interprets captured debug information; the platform can boot firmware, bootloaders, and operating systems and supports breakpoints, watchpoints, state inspection, and execution tracing. The source does not state the cause (no cause-related event).
RISC-V processorsS2C, Andes Technology and 3 totalSemiWiki
Murata Manufacturing has developed the NCU01 series, an 008004-inch negative temperature coefficient (NTC) thermistor measuring just 0.25 × 0.125 mm, described as the world's smallest. Compared with the company's previous smallest 01005-inch product, the new component reduces mounting area by approximately 60% while maintaining equivalent temperature-sensing performance, with both resistance and B-constant tolerances specified at ±1%. The ultra-compact thermistor targets densely integrated devices including smartphones, wearable electronics, IC packages, and SiP modules, allowing temperature sensors to be placed closer to heat-generating components. Murata plans to begin sample shipments in October 2026, followed by mass production in 2027; the initial lineup will include 100 kΩ and 10 kΩ resistance variants, with additional options introduced progressively.
On October 27, 2026, Rochester Electronics announced continued lifecycle support for Intel x86 processors. Rochester has partnered with Intel for more than 35 years, providing continued support for legacy microcontrollers and microprocessors including the 8051, 8086/8088, 80C186XL, 80C188XL, 80C196KC, and other established devices. Rochester's product replication engineering team has successfully ported the 80C186XL multiple times in response to manufacturing process obsolescence, helping ensure a continued supply path for customers supporting long-life applications; it also established PLCC assembly capabilities at its Newburyport headquarters after the original industry packaging infrastructure became unavailable. Rochester maintains inventory across a broad range of Intel 32-bit and 64-bit x86 processors, supporting more than 280 part numbers and over two million units, with available families including Xeon, Pentium, Core Duo, Celeron, Atom, and legacy 80286, 80386, and 80486 processors. Rochester's Intel offering also includes millions of chipsets and interface devices, complemented by a broad portfolio of memory, logic, and power management products. The source does not state the cause (such as any price or supply-demand change).
Intel x86 processors80518086/8088Rochester Electronics, IntelElectronics SourcingInventory Shift