Synopsys Expands Access to Advanced Chip Design Capabilities Through European Chips Design Platform

What happened

Synopsys announced at an event in Brussels an agreement with the European Chips Joint Undertaking (Chips JU) to make its electronic design automation (EDA) software available to semiconductor startups and medium-sized enterprises (SMEs) through the European Chips Design Platform (EuroCDP), as a new simplified entry point in addition to EuroCDP's existing offering of IP, training, funding and prototyping support. Synopsys will support both Level 1 and Level 2 of the EuroCDP program, covering participants from the earliest stage of their venture through pre-production. Its EDA coverage includes full digital front-end and back-end flows for advanced AI and HPC SoC designs on leading-edge process technologies at key foundries, photonic integrated circuit (PIC) flows for optical networking, data centers, and sensing, and analog/mixed-signal (AMS) flows for industrial, automotive, and connectivity applications. EuroCDP members will gain access to the same Synopsys production-proven design, verification and signoff solutions deployed by leading semiconductor companies. Chips JU Executive Director Jari Kinaret said the platform is designed to give startups, SMEs and research teams a clearer pathway to needed resources, and Synopsys Chief Strategy Officer Antonio Varas said joining the initiative contributes to the goals of the European Chips Act. The release also notes that Axelera AI leveraged Synopsys digital design and implementation and verification technologies, plus power-integrity technology from Ansys (now part of Synopsys), in developing its Metis and Europa AI Processing Units (AIPUs).

Impact and signal

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Source and time

Source: EE Journal · 11/5/2026 · View original source