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Synopsys

NuAxi groups public briefings that mention Synopsys: product launches, capacity and pricing signals, and supply-chain changes. The page updates continuously.

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Fri, Oct 30

  1. Impact score 30

    SEMICON West 2026: AI Made the Steps Faster. The Time Between Them Is Next.

    Conference report from SEMICON West 2026: SEMI President and CEO Ajit Manocha told the CEO Summit that the semiconductor industry crossed $1 trillion in annual revenue this year, almost four years ahead of earlier projections; a year ago the forecast for 2030 was $1 trillion, now it is $2 trillion, with $3 trillion possible by 2035; the industry has 102 new fabs coming online through 2029 and needs more than 50 beyond that by 2035. Synopsys CEO Sassine Ghazi named the shortage of engineers as the industry's challenge, and Brooks Automation CEO Dave Jarzynka noted a wafer spends only about 25% of its time in the fab actually being processed. In the design session "Bridging Design and Manufacturing with AI" on Tuesday, October 13 in Room 20 at Moscone North, speakers from TSMC, Intel, Applied Materials, Lam Research, Cadence, Silvaco, PDF Solutions, McKinsey, Cerebras, SanDisk and VerifAIX covered seven themes. Specific figures include: Intel's DTCO decisions dropped from weeks to one or two hours; Applied Materials cut a 3D gate-all-around device simulation from 20.5 days to 19.7 hours on GPUs; McKinsey showed AI-assisted programs reaching tape-out nine months after design starts and cutting debug closure time by 40%; TSMC's agentic place-and-route runs around the clock at 3 to 5x productivity; Rhines showed NAND process steps rising from about 400 to as many as 1,800, wafer lot cycle time stretching from 8 to 10 weeks at 28nm to 16 weeks or more, and mask sets climbing from $1 to 3 million to $20 to 40 million or more; VerifAIX cited first-silicon success at 14% and the best AI pass rate on hardware code generation at 34%; PDF Solutions' Kimon Michaels cited Qualcomm's engineering and manufacturing data growing 600% since 2022, while less than 5% of manufacturing data gets analyzed; Lam's research published in Nature found engineers and algorithms working together, with the handoff in the right place, cut the cost of reaching a process target in half. The session also covered co-optimization (DTCO/STCO) replacing sequential handoffs, trust issues in autonomous design, and digital twins changing development. This is a conference recap and industry background; the source does not state the cause (no single event cause).

    NAND3D gate-all-around deviceCFETTSMC, Intel and 16 totalSemiWiki

Tue, Oct 27

  1. Impact score 0

    Cadence says chip design demand is broadening beyond AI as analysts test margins, rival targets

    Cadence Design Systems used its third-quarter earnings call to argue that demand for chip design tools is no longer tied only to the AI hardware buildout, pointing to analog and memory chipmakers, system companies, and new entrants such as space and finance firms designing their own silicon. On the October 26 call, analysts pressed two questions that will shape the coming year: how much growth comes from agentic AI rather than hardware, and whether Cadence can match the long-term targets rival Synopsys set a month earlier.

    chip design toolsCadence, SynopsysDigiTimes Asia

Thu, Oct 15

  1. Impact score 10

    Synopsys CEO says fully autonomous AI chip design remains out of reach

    Synopsys CEO Sassine Ghazi said during the CEO Summit at SEMICON West 2026 that fully autonomous chip development has not yet crossed the final hurdle to become reality, although the company has advanced from AI-assisted engineering to models that coordinate more than 40 task agents. He added that AI-era chip development requires co-optimization across physics, materials, processes, architectures, software, and models.

    SynopsysDigiTimes Asia

Fri, Oct 9

  1. Impact score 10

    CASPA CEO Summit and Why it Matters

    The Chinese American Semiconductor Professional Association (CASPA) has announced that its CEO Summit is scheduled for October 23–24, 2026, at the Santa Clara Convention Center, marking the association's 35th anniversary, under the theme "Silicon, Systems, and Intelligence: Designing the Next Decade." CASPA describes the summit as its largest gathering of global semiconductor CEOs. The announced program includes an onstage conversation between Intel CEO Lip-Bu Tan and CASPA President Jimmy Cheng, alongside announced participants from Synopsys, Lumentum, Altera, SambaNova Systems, d-Matrix, and Solidigm, as well as venture capital representatives. The author will also moderate a panel with the CEOs of three AI startups on Friday at 3:30 p.m. The event remains in the planned stage; this is industry conference information with no price or supply-demand data.

    Intel, Synopsys and 7 totalSemiWiki

Mon, Oct 5

  1. Impact score 10

    From Simulation to Deployment: Why Physical AI Matters

    NVIDIA and Synopsys are integrating physics simulation into AI infrastructure to support the shift toward Physical AI. This collaboration aims to bridge the sim-to-real gap by providing high-fidelity digital twins for training autonomous systems. The trend indicates growing demand for AI compute and simulation tools but lacks immediate price impact.

    AI InfrastructureAccelerated ComputingNVIDIA, SynopsysSemiWikiTechnical

Thu, Oct 1

  1. Impact score 10

    OpenAI and Synopsys Announce GPT-Synopsys: Frontier Intelligence to Revolutionize Chip Design

    Synopsys and OpenAI announced a multi-year partnership to develop GPT-Synopsys, an AI model integrated with EDA tools. This collaboration aims to optimize chip design workflows and PPA. The immediate trading impact is neutral as it represents a long-term strategic development rather than a supply shock or price movement.

    EDA ToolsSynopsys SoftwareSynopsys, OpenAIEE JournalPartnership/M&A
  2. Impact score 45

    Synopsys and Amazon sign US$1 billion-plus deal to speed custom chip development

    Synopsys and Amazon have signed a strategic agreement valued at over $1 billion to accelerate Amazon's custom silicon development. This deal supports Amazon's complex AI-powered products and cloud infrastructure projects. Bullish for Synopsys' revenue outlook and market position in EDA tools.

    Custom SiliconEDA ToolsSynopsys, AmazonDigiTimes AsiaPartnership/M&A

Tue, Sep 8

  1. Impact score 5

    AI Memory Gap at DAC 2026

    Synopsys presented TetraMem and ANAFLASH at DAC 2026, showcasing in-memory computing solutions for AI. TetraMem targets 2026 shipment of a multi-level ReRAM chip, while ANAFLASH introduced Legato-Logic. These technologies aim to bypass memory bandwidth bottlenecks in edge AI.

    ReRAMHBMDRAMSynopsys, TetraMem and 3 totalSemiWikiProduct Launch

Thu, Aug 20

Tue, Jul 28

  1. Impact score 10

    Synopsys, Intel Foundry Expand AI-powered EDA Collaboration for Intel 14A

    Synopsys and Intel Foundry are deepening their AI-driven EDA collaboration to advance Intel 14A process readiness. The partnership utilizes multiphysics analysis and expanded IP to accelerate design workflows. Neutral: This is a technical milestone with no immediate impact on component pricing or supply.

    Synopsys, Intel FoundryEE Times AsiaPartnership/M&A

Thu, Jul 23

  1. Impact score 10

    Agentrys Weighs in on LLM Benchmarking for Chip Design at DAC 2026

    Si2 and industry leaders including Nvidia, Cadence, and Synopsys are establishing standardized benchmarks for LLMs in chip design at DAC 2026. This initiative aims to create consistent evaluation methods for AI agents in Electronic Design Automation (EDA) workflows. The move supports long-term AI adoption in semiconductor design but has no immediate impact on component pricing or supply.

    Nvidia, Normal Computing and 5 totalSemiWikiTechnical

Wed, Jul 22

Tue, Jul 14

  1. Impact score 10

    Electronic System Design Industry Revenue Up 13% in 1Q 2026

    The Electronic Design Automation (EDA) industry reported 13% year-over-year revenue growth in Q1 2026, indicating robust demand for design tools.

    Synopsys, Cadence Design Systems and 4 totalEE Times AsiaMarket Analysis

Thu, Jul 9

  1. Impact score 10

    MIPS Discusses RISC-V Shift

    MIPS announces a strategic shift towards RISC-V and ARC AI for physical AI in cars and factory robots. This move indicates a transition in architecture preferences. Impact on RISC-V and ARC IP licensing is neutral due to lack of specific data.

    RISC-V IPARC AI IPMIPS IPMIPS Technologies, Synopsys and 3 totalEE Times AsiaTechnical

Thu, Jun 11

  1. Impact score 10

    Re-Architecting Die-to-Die IO For AI

    Synopsys introduces 3D-IO technology to facilitate the shift towards hybrid-bonded 3D integration for AI chips.

    3D-IO3D IntegrationHybrid BondingSynopsysSemiconductor EngineeringTechnical

Wed, Jun 10

  1. Impact score 10

    Customized Foundation IP Enables the Next Generation of Automotive Compute

    Synopsys introduces customized Foundation IP to support next-generation automotive compute requirements driven by software-defined vehicles. As automotive SoCs demand higher performance and reliability, FinFET technology and tailored IP libraries become essential. Neutral - This article highlights a technology trend and R&D milestone rather than immediate supply or price impacts.

    Automotive SoCsSynopsysSemiWikiTechnical

Thu, Jun 4

  1. Impact score 5

    Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools

    Intel is advancing its EMIB technology through a collaboration with Synopsys to enhance design methodologies for advanced packaging. This partnership aims to address the increasing complexity of chiplet integration by improving signal integrity and power analysis. The focus is on enabling high-bandwidth, low-latency connections for high-performance computing and AI applications.

    EMIBChipletsIntel, SynopsysSemiWikiTechnical

Wed, Jun 3

  1. Impact score 40

    GlobalFoundries completes acquisition of Synopsys' ARC processor IP business to build physical AI platform

    GlobalFoundries completed its acquisition of Synopsys' ARC Processor IP Solutions business. The deal combines Synopsys' ARC IP with GF's MIPS portfolio to enhance its custom silicon and RISC-V offerings. Watch: The consolidation of IP and manufacturing under GF aims to streamline physical AI platform development, though immediate spot market impacts are nil.

    Processor IPRISC-VGlobalFoundries, SynopsysDigiTimes AsiaPartnership/M&A
  2. Impact score 10

    Globalfoundries takes over koi ARC

    Globalfoundries completed the acquisition of the ARC processor IP from Synopsys. This integrates with its existing MIPS assets to form a comprehensive RISC-V IP suite. Neutral: This IP asset transfer has no immediate impact on wafer capacity or component spot pricing.

    RISC-V IPARC Processor IPGlobalfoundries, SynopsysElectronics WeeklyPartnership/M&A

Fri, May 29

  1. Impact score 15

    5 takeaways from Samsung Foundry’s design tie-up with Synopsys

    Samsung Foundry and Synopsys announced a partnership to provide production-ready, AI-powered EDA flows and DTCO solutions for 2-nm processes. This collaboration leverages AI automation and multiphysics sign-off to optimize design and manufacturing flows, aiming to enhance PPA and reduce integration risks. Neutral: While this strengthens the supply chain readiness for advanced nodes, it does not immediately impact spot prices or create shortages.

    2-nm ProcessAnalog FlowDigital FlowSamsung Electronics, SynopsysEDNPartnership/M&A