Cadence Raises Annual Revenue Forecast as AI Boosts Chip Design Productivity

What happened

During its third-quarter earnings call held on Oct. 26 local time, Cadence Design Systems raised its full-year revenue forecast to between $6.387 billion and $6.417 billion, implying 21% year-on-year growth, up from the 19% growth forecast issued with its second-quarter results. The company reported third-quarter revenue of $1.63331 billion, up 22% from a year earlier; non-GAAP operating margin excluding one-time costs was 44.1%; non-GAAP EPS rose 9% to $2.11; and backlog reached a record $8.2 billion at the end of the quarter. Cadence unveiled Maestro, a family of AI models specialized for semiconductor and system design, based on open-weight models post-trained using Cadence's design tools and data, saying initial results showed up to a 30% improvement in design quality and up to a fivefold improvement in token efficiency compared with general-purpose foundation models; it plans to integrate Maestro with its AI design agents including ChipStack, InnoStack and AuraStack. CEO Anirudh Devgan said that two decades ago IBM and Intel needed 500 engineers working for five years to design a single CPU, versus 50 engineers working for six months today, that chip design has become roughly 100 times easier, that AI could deliver an additional five- to tenfold efficiency gain, and that the combined improvements could make chip design 1,000 times easier than 20 to 25 years ago; he also said about 45% of the company's business comes from non-semiconductor companies. Samsung Foundry adopted InnoStack in the third quarter to improve the efficiency of process migration and design technology co-optimization (DTCO); Renesas Electronics' MCU development team achieved a 34-fold productivity improvement by applying InnoStack to multiple tasks and plans to extend its use to layout automation; MediaTek integrated ChipStack into its production digital verification flow, increasing verification coverage by 50% to 70% while reducing engineering workloads by 1.4 to 2 times. CFO John Wall said AI agents can generate and run far more design iterations than engineers manually operating the tools, potentially driving a substantial increase in EDA tool consumption.

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Source and time

Source: The Elec · 10/26/2026 · View original source