According to TrendForce, Samsung and AMD teamed up at OCP 2026 to showcase a CXL-based solution powered by Samsung's CMM-D, enabling shared memory and flexible capacity expansion for AI inference workloads. This is a product showcase/joint demonstration, posted at 12:00 PM on Oct 13, 2026; the source does not state the cause, and no price, production or shipment figures are involved.
CXL-based solutionCMM-DSamsung, AMDTrendForce Official (Market Data)Partnership/M&A
During her keynote at the OCP Global Summit 2026 on October 12, AMD CEO Lisa Su expressed strong confidence in the CPU market's growth prospects and called 2026 the "Year of Inference." She also raised AMD's forecast for the 2030 CPU TAM to $200B+. This is a forward-looking forecast target, not an achieved result; the source does not state the cause, only the confidence expression.
MangoBoost launched its AI inference platform Mango Inference on Oct. 12, after first unveiling it in July. The company said its pricing is more than 20% lower than competitors, and it plans to build a 1‑megawatt AI data center in Gangnam, Seoul by Q1 next year, expandable to 5MW, with GPUs from AMD and memory from Samsung Electronics and SK hynix. MangoBoost targets over 100 billion won in revenue next year, expecting around 10 billion won this year, and was founded in 2022.
AMD has launched Helion, an open rack architecture designed for agentic AI workloads, aiming to optimize compute, power, and cooling allocation in data centers.
AI AcceleratorsInterconnectsCooling SystemsAMDDigiTimes AsiaProduct Launch
According to ZDNet, Samsung Electronics teamed up with AMD to demonstrate a Compute Express Link (CXL)-based memory expansion solution at the OCP Global Summit 2026; featuring Samsung's CMM-D-based memory pooling technology, the solution enables multiple systems to share memory resources more efficiently and flexibly expand capacity. As noted by NewsPim, Samsung sees CXL-based memory expansion as a way to overcome the capacity limitations of conventional systems, particularly as AI agents drive higher memory requirements for inference. The demonstration follows a memorandum of understanding signed by Samsung and AMD in March to expand cooperation on next-generation AI memory and computing technologies; per The Korea Times, during her October 7 visit to South Korea, AMD CEO Lisa Su also discussed potential collaboration with Samsung in memory and foundry technologies (a discussion, not a confirmed collaboration). At the event, Samsung outlined plans to expand its AI memory and storage portfolio, highlighting next-generation technologies including HBM5, custom HBM, zHBM, and processing-in-memory (PIM), alongside CMM-D and CXL-based solutions, while advancing next-generation SSD technologies including quad-level cell (QLC) NAND and flexible data placement (FDP), and showcasing KV cache optimization and Direct Storage technologies. Through its Samsung MAX Lab, customers can evaluate emerging technologies including PIM, CMM-D, and next-generation SSDs under real-world AI workloads before commercialization. Samsung also displayed a Groq LPU wafer and NVIDIA's Groq 3 LPX system, with the chips mass-produced using Samsung Foundry's 4nm process, and a wafer manufactured using its 2nm gate-all-around (GAA) process.
AMD began shipping Helios production in September 2026, with the first systems installed at leading customers including OpenAI, Meta, Microsoft, Oracle, and Anthropic. The source does not state the cause.
Reported October 13, 2026: Microsoft and Intel on Monday unveiled their latest in-house AI accelerators, stepping up their challenge to NVIDIA. According to Reuters, Microsoft's Maia 300 features a multi-chiplet architecture using TSMC's 2nm (N2P) process for core computing chiplets, with memory controllers and I/O functions on 3nm dies; per Seoul Economic Daily, Maia 300 packs eight HBM4 stacks, up from six HBM3E stacks in Maia 200, raising memory capacity from 216GB to 288GB. Microsoft said the architecture delivers 36% more compute FLOPs, 2.5 times the HBM bandwidth and 14% higher scale-up bandwidth. According to Reuters, Microsoft plans to roll out potentially more than one million Maia 300 accelerators next year, with each rack housing 96 chips and consuming around 167kW, and claims roughly 40% more computing output per megawatt than leading GPU-based systems; per Seoul Economic Daily, total HBM stacks per rack jump 2.7-fold from 288 to 768, potentially opening a major new growth opportunity for memory suppliers. SK hynix is seen as a leading contender (sole HBM3E supplier for Maia 200), and Samsung could also secure orders with its 36GB 12-high HBM4 now in mass production. On Intel's side, per Tom's Hardware, at OCP 2026 Intel officially branded its Xe3P-architecture Crescent Island AI inference accelerator as the Intel GPU D-Series, unveiling performance targets of 1.3 PFLOPS in FP8 compute and 1.5TB/s of memory bandwidth; per Wccftech, it opts for LPDDR5X over the increasingly costly and supply-constrained HBM, supporting up to 480GB of LPDDR5X (reference PCIe card: 160GB), positioned as a cost-efficient option for AI inference; the 350W accelerator's manufacturing process remains undisclosed. These remain unveilings and plans; deployment and orders are not yet confirmed.
HBM4HBM3ELPDDR5XMicrosoft, Intel and 5 totalTrendForce
Microsoft's in-house Azure Maia chips will become the main platform for its own AI services, including Microsoft 365 Copilot, GitHub Copilot and Microsoft Foundry; however, the company will continue to use GPUs from Nvidia and AMD.
Maia 300Microsoft, Nvidia and 3 totalDigiTimes Asia
On October 12, 2026, TrendForce reported that CPU prices are heating up as TSMC raises foundry prices. Intel's high-end Panther Lake reportedly faces 15–20% hikes, while Qualcomm's Snapdragon X/X2 Elite see increases of around 10%. The headline additionally indicates AMD may join the price hike wave (stated as 'may join,' an unconfirmed possibility), linking the increases to TSMC costs. Apart from TSMC's foundry price increase, the source does not state the cause.
CPUTSMC, Intel and 4 totalTrendForce Official (Market Data)Price Movement
According to Commercial Times, the CPU price-hike wave is gaining momentum in October, fueled by growing demand for AI PCs and servers and rising advanced-node manufacturing costs. Intel has raised processor prices three times since late last year, and reportedly introduced price adjustments across its product lines starting September 1, with high-end Panther Lake models seeing the largest increases of 15% to 20%, compared with 5% to 10% for Meteor Lake and Arrow Lake. The latest hikes do not apply to the entire Panther Lake lineup but focus on models with high-end GPU tiles, which are manufactured by TSMC on its N3E, while Panther Lake adopts a heterogeneous integration architecture combining these GPU tiles with CPU compute tiles produced on Intel's own 18A. According to Commercial Times, citing supply chain sources, Qualcomm increased prices for PC processor platforms including Snapdragon X and X2 Elite by approximately 10% starting in October. AMD is reportedly preparing price adjustments for certain CPUs, although the magnitude, scope, and timing remain unconfirmed. Foundry pricing is a key factor: according to Central News Agency, analysts forecast TSMC will raise manufacturing prices further in 2027, with increases of 5% to 10% for advanced nodes, 10% to 15% for advanced packaging, and 3% to 5% for mature nodes. According to TrendForce, CPU supply has improved significantly since 2Q26, allowing brands to normalize procurement and production; as CPU shortages ease in 2H26, the decline in global notebook shipments for full-year 2026 is expected to narrow to 9.4% YoY, though continued increases in DRAM and SSD prices alongside higher CPU costs continue to pressure notebook makers. Per Reuters, CEO Lisa Su said on October 6 that AMD is working with partners including TSMC to expand CPU and GPU production capacity to meet growing AI demand; AMD has begun ramping its sixth-generation EPYC processors (Venice) on TSMC's 2nm and plans to substantially increase chip supply in 2027.
CPUprocessorPC processor platformIntel, Qualcomm and 4 totalTrendForcePrice Movement
AMD reportedly raised GDDR6 prices for board partners effective October 1, aligning with recent Radeon price hikes in China. This follows previous increases in July and September tied to rising TSMC costs. The move is bullish for memory suppliers and indicates continued pricing pressure in the GPU market.
Global PC shipments cratered due to rising prices hammering demand, with Omdia reporting a 21.2% year-on-year decline to 58.1 million units in Q3 2026 and IDC estimating a 20.1% decline to 62.7 million units; IDC also noted a 9.1% quarter‑on‑quarter drop from Q2 2026. The downturn follows AI‑fueled component shortages that have driven costs soaring, as DRAM and SSDs now account for nearly 40% of a PC’s component costs (up from ~15%) after more than fourfold price increases, while shortages of processors, graphics cards and other integrated circuits add pressure. Major vendors saw declines: Lenovo 22.6%, HP ~31%, Dell 25%, Apple 11% (IDC). Omdia forecasts a further 24% YoY decline in Q4 2026 and a 7% decline across 2027.
DRAMSSDsprocessorsLenovo, HP and 4 totalThe RegisterPrice Movement
According to a report published on 9 October 2026, Gigabyte has confirmed Intel's plans to introduce new processors compatible with existing LGA 1700 motherboards, with an expected launch in early 2027. Gigabyte is rolling out a new BIOS update to extend support for the upcoming processors across its entire lineup of Intel B760 and H610 motherboards, covering both the DDR4 and DDR5 variants of these motherboard families, so owners of supported boards can upgrade to the new CPUs without replacing their motherboards. Certain motherboard series such as the Z690, Z790, and B660, which also feature the LGA 1700 socket, are not included in the announcement. Gigabyte has not disclosed SKUs, specifications, or pricing of the upcoming processors; the early 2027 launch window aligns with previous reports about Intel's rumored Raptor Lake Next lineup. In a separate report, it has been speculated that Raptor Lake Next could adopt Intel's Core 200 branding, spanning Core 3, Core 5, and Core 7 models; per leaked specifications, the range could include a 20-core Core 7 with 8 Performance and 12 Efficient cores rated at 65W, a 16-core Core 5 with 8 P-cores and 8 E-cores rated at 125W, a 10-core Core 5 with 6 P-cores and 4 E-cores rated at 65W and equipped with 24MB of L3 cache, and an entry-level four-core Core 3 featuring only P-cores, also rated at 65W. The new-processor claims remain at the rumor/plan stage; the source does not state the cause for excluding the Z690-series boards.
On Friday, 9 October 2026, Kioxia introduced its LD4-series SSDs in an E1.L form factor (318.75 mm length × 38.4 mm height × 9.5 mm thick) designed for high-density storage deployments in hyperscale data centers, with capacities up to 122.88TB. The new drives use proven BiCS8 3D QLC NAND and target read-intensive workloads such as AI data repositories and object storage. They rely on Kioxia's proprietary platform complying with the NVMe 2.0e specification, feature a single-port configuration, and meet select requirements of the OCP Datacenter NVMe SSD specification 2.6; although listed as PCIe 5.0 compliant, the drives operate at PCIe 4.0 x4 speeds of up to 16 GT/s per lane, providing a theoretical maximum bandwidth of approximately 7.88 GB/s in each direction. Kioxia is currently sampling 15.36 TB and 30.72 TB LD4 drives to select customers and has validated an architecture capable of supporting 122.88 TB drives, but it has not disclosed when such drives will become available or when the series will enter mass production. The company also did not disclose sequential read/write speeds, random read/write IOPS, latency, DWPD/TBW endurance ratings, or power consumption. The drives will be demonstrated at the OCP Global Summit in San Jose in mid-October.
UK terahertz technology company TeraView has begun a proof-of-concept (PoC) for new equipment designed to non-destructively inspect through-glass vias (TGVs) in glass substrates, targeting detection of defects smaller than 5 micrometers (μm). According to industry sources on Oct. 8, TeraView is developing the glass-substrate inspection equipment at its UK headquarters; the system is intended to identify microscopic cracks in glass substrates immediately after the TGV process, and demonstration tests are currently being conducted using R&D glass substrate samples manufactured by UK universities and research institutes. The new equipment is based on TeraCota technology (EOTPR cannot inspect a TGV structure before copper plating is applied), and TeraView's current goal is to improve detection capability to 5 μm or less; after improving the equipment's readiness, the company plans to supply it in line with the mass-production schedules of major glass-substrate companies in South Korea and overseas. The industry currently expects commercialization of glass substrates around 2030, about two years later than forecasts made last year. Separately, on Oct. 5, TeraView signed a 1.073 billion won contract to supply EOTPR equipment to a large cloud service provider (hyperscaler) that develops AI chips; the equipment is also being supplied to major semiconductor companies and their partners, including NVIDIA and AMD. The source does not state the cause (no cause is involved).
At an event in Washington, DC on Thursday, Nvidia announced a commitment of $1 billion — about 1/60th of its quarterly profits — to funding US scientific discovery over the next five years, supporting AI (or, as it is now framed, "super intelligence") research and development in fields including quantum computing, healthcare, and energy security. The initiative is part of the US government's broader Genesis Mission, announced late last year by the Trump administration, which aims to use AI to drive the scientific discoveries needed to ensure the country's continued technological leadership. The program marks Nvidia's big return to US supercomputing: last year Nvidia revealed it would supply the US government with no fewer than seven new supercomputers across the Argonne, Los Alamos, and Lawrence Berkeley National Laboratories; Argonne will house the 100,000 Blackwell-GPU-based Solstice system built in collaboration with Oracle, while Los Alamos' upcoming Mission and Vision systems will use the same chips and Nvidia's Quantum-X800 InfiniBand. As background, the DoE's biggest supercomputer for pure FP64 will still be powered by AMD — Oak Ridge's Discovery system, built by HPE's Cray division, expected online 2029 with peak theoretical performance between 3.3 and 8.5 exaFLOPS depending on a possible facility power upgrade — while China's LineShine leads the Top500 with 2.2 exaFLOPS measured out of 2.7 exaFLOPS theoretical. The source does not state how the committed funds will be specifically allocated.
AMD has detailed the IBS Memory Profiler, a little-discussed hardware feature in its upcoming Zen 6 processors. AMD engineer Bharata Bhasker Rao presented it at the Linux Plumbers Conference (LPC) 2026 in Prague on October 5. Instruction-Based Sampling (IBS) is AMD's existing profiling hardware, and Zen 6 adds a separate, lighter instance that only samples data memory accesses; each sample hands the kernel the physical address of the access and shows whether the data came from DRAM or external memory such as CXL. AMD's EPYC 9006 "Venice" chips support memory expansion via CXL 3.1. AMD wants to feed the profiler's samples into pghot, a proposed kernel subsystem for hot page tracking; the pghot patches are still in development. The results are a mixed bag: on a test system with 256 logical CPUs and 256 GB of CXL memory, XSBench ran at 4.57x over a no-tiering baseline against 1.18x for the current method, and Graph500 hit 3.17x against 2.34x; Redis saw no gain and NAS BT landed slightly behind. Per-folio promotion cost fell from 26.1 to 15.8 microseconds in an overhead test, though that benchmark finished about 5% slower. These are AMD's own numbers, and the slides list no virtualization support for the profiler. EPYC Venice is in production, with cloud deployments expected later this year.
Zen 6 processorsIBS Memory ProfilerEPYC 9006 "Venice"AMDTechPowerUp
According to VideoCardz, citing a source on Board Channels, AMD has increased GPU vendor pricing by as much as $104 in China. The Radeon RX 9070 receives a price hike equivalent to $104, the steepest increase on the list, while the Radeon RX 9060 XT 8 GB gets the smallest increase at $45; the Radeon RX 9070 XT and RX6500 XT pricing remain unchanged. The price hikes are reportedly motivated by higher memory prices and manufacturing costs. The increases are seemingly local to China for the time being, but international board partners have also been informed of the upcoming changes.
AMD CEO Lisa Su visited Samsung on Oct 7 to discuss HBM supply and foundry orders. Samsung seeks foundry business in exchange, but AMD officials cited high risk in outsourcing to Samsung. Neither party has confirmed the deal.