Researchers at Missouri University of Science and Technology published a survey titled 'Can Autonomous Vehicles Keep Their Cool? A Survey of Thermal Side-Channel and Perception Attacks,' highlighting that thermal side channels create new security risks for autonomous vehicles. According to an abstract excerpt, the survey systematizes thirteen representative works into thermal perception integrity, telemetry leakage, and model-information extraction, comparing them by privilege, timescale, co-tenancy, deployability, and AV relevance. The source does not state any direct supply-chain or price impact.
According to Commercial Times, citing institutional investors, Google's TPU v9 project, involving MediaTek, could see its initial tape-out delayed until January 2027 following design revisions, with shipments potentially pushed back to the first quarter of 2028; the November 2026 sampling target remains unchanged, and the production-version tape-out is expected in the second quarter. The report notes that revisions to Google's TPU v9 Core A design, codenamed Humifish... wait, Humufish, have delayed development by approximately three weeks, affecting the Core B and I/O designs handled by MediaTek. According to TrendForce, the chip is expected to adopt Intel's EMIB-T advanced packaging, with substrate yields remaining a key challenge to production scalability and cost competitiveness. Bloomberg, citing sources, reports that ByteDance is nearing an agreement to purchase MediaTek's data center chips, potentially making it MediaTek's second major ASIC customer after Alphabet's Google. Among Taiwanese ASIC design firms: GUC, supported by cloud customers' CPU and ASIC programs, reported record September revenue of NT$7.145 billion, up 97.8% year over year; Alchip posted September revenue of NT$9.979 billion, surging 496% year over year as shipments of 3nm AI accelerators increased. Faraday has obtained Samsung's 2nm process design kit (PDK) to pursue related design opportunities; per Commercial Times, Samsung's 4nm capacity is reportedly fully utilized, prompting some AI ASIC customers to evaluate its 2nm node. Faraday has also completed its design environment setup for Intel's 18A-P and begun offering design services, with plans to pursue more projects in 2027. Commercial Times, citing institutional investors, projects global AI ASIC accelerator shipments to reach 14.1 million units in 2027, up approximately 69% year over year.
Google TPU v9Core A (codenamed Humufish)Core BMediaTek, Google and 11 totalTrendForce
According to Seoul Economic Daily (with ZDNet having reported in September that Samsung is pursuing a dual-track strategy for custom HBM, tapping both its own foundry and rival TSMC), NVIDIA has asked Samsung, SK hynix and Micron to adopt TSMC's 3nm process for the base dies of its NVHBM, unveiled in August. Samsung's Device Solutions (DS) division reportedly agreed to the requirements following an internal review. The stated causes are NVIDIA's push to standardize production across suppliers to ensure consistent HBM performance and simplify product validation; additionally, industry estimates place TSMC's 3nm yields above 90%, versus around 60% for Samsung Foundry's 2nm (SF2) process. NVHBM's custom base die integrates the memory controller traditionally housed in the GPU; according to NVIDIA, the technology offers up to 30% more memory bandwidth, 15% lower HBM power consumption and 25% more XPU compute die area than standard HBM4E. The partnership is not entirely new: according to Seoul Economic Daily, Samsung and TSMC first collaborated four years ago to ensure HBM compatibility with TSMC's GPU packaging process, and this latest tie-up extends into HBM manufacturing for the first time. Samsung is keeping its own foundry in play: with TSMC's 3nm capacity facing competing demand from AI accelerators and smartphone chips, Samsung is validating NVHBM base die production on its 2nm process as a potential alternative should TSMC face capacity constraints. TSMC flagged tight 3nm capacity at its October 15 earnings call, with the node accounting for 33% of third-quarter wafer sales, its largest share among all process nodes; according to Economic Daily News, Chairman and CEO C.C. Wei announced plans for another 3nm fab in Tainan, on top of existing expansion projects in Arizona, Japan's Kumamoto and Taiwan's Southern Taiwan Science Park, with the additional fab slated to begin mass production in the first half of 2028. Samsung also continues in-house base die production for its standard HBM lineup: HBM4, which entered mass production earlier this year, and HBM4E, now undergoing production validation, both use Samsung Foundry's 4nm process for base dies, while their core dies are manufactured on 1c DRAM lines at its Hwaseong and Pyeongtaek campuses; Samsung plans to maintain its turnkey approach to base die production for custom HBM supplied to other customers, including AMD.
NVHBMNVHBM base dieHBM4NVIDIA, TSMC and 5 totalTrendForcePartnership/M&A
The source is an interview with Francisco Almada Lobo, CEO and co-founder of Critical Manufacturing. The company was founded in Porto, Portugal, in 2009 and builds an Industrial Operations Platform with a manufacturing execution system (MES) at its core; since 2018 it has been part of ASMPT. Its strongest application area is semiconductor back-end and advanced packaging, which it says is also where demand is growing most. It notes new capacity is being built in the US, Europe, India and Southeast Asia, and that advanced packaging moves front-end complexity into the back-end. This is background interview content; the source contains no component price movement, production halt, or policy event.
Huawei scientist Huang Yu said at the October 15, 2026 Bay Area Chip Expo that EDA tools pose the biggest challenge to the Tau (τ) Scaling Law. Huawei formally introduced the Tau Scaling Law on May 25, 2026 at ISCAS 2026, and in October 2026 launched the Mate 90 series featuring the Kirin 9050 Pro chip based on LogicFolding technology, marking the theory's transition from concept to commercial product.
According to a technical analysis from the SPIE Digital Library, conventional extreme-ultraviolet (EUV) lithography uses a 13.5-nanometer wavelength projected through reflective optics with a custom photomask per layer, and can print extremely small features at high throughput, but every new design requires an expensive mask set. Maskless EUV lithography proposes storing patterns not on a physical mask but using a programmable array or another rapidly addressable optical element to write digital patterns directly onto the wafer, avoiding the serial point-by-point speed bottleneck of electron-beam lithography, shortening iteration cycles and lowering the fixed cost of small-volume production. The article states the approach is not a simple replacement for EUV scanners or e-beam tools: EUV radiation is strongly absorbed by most materials, so the system must operate in vacuum with specialized reflective optics; a programmable pattern generator must maintain nanometer-scale placement accuracy under EUV exposure, control heat and contamination, and avoid adding defects; photoresist stochastic variation at very small dimensions and real-time delivery of vast pattern files are further challenges. First successful applications would likely be selective—rapid prototyping, low-volume advanced devices, research, mask repair, or particular critical layers—rather than a wholesale takeover of high-volume lithography. This is background technical analysis; no specific manufacturers, volumes, prices or orders are cited.
Kulicke & Soffa reported fiscal Q3 2026 net revenue of $330.4 million, up 123% year-over-year, with gross margin of 47.8% and non-GAAP EPS of $1.20, beating expectations. The company guided to roughly $375 million for Q4 fiscal 2026 ending October 3, 2026, citing strengthening demand across semiconductor, memory, automotive, and industrial markets.
SEMI Americas President Joe Stockunas stated at SEMICON West 2026 on Oct. 15 that the industry would like to see investment tax credits for fab construction extended to supplier infrastructure and is working to make it happen. He noted announced investments exceed $800 billion and there are $330 billion in announced investments in Phoenix.
Nvidia launched RTX Spark AI laptops in Korea, with sales starting Oct. 16; the least expensive model, MSI Prestige N16, is priced at 5.799 million won, and Nvidia attributed the high price to rising memory costs.
Nvidia and Mercedes-Benz announced on Oct. 15 local time that they are extending their strategic partnership to develop next-generation autonomous driving systems. The collaboration will combine Mercedes-Benz’s automotive engineering expertise and its Mercedes-Benz Operating System (MB.OS) with Nvidia’s accelerated computing and artificial intelligence (AI) technologies, including Nvidia Hyperion, Alpamayo and Halos. The two companies also plan to develop Level 4 autonomous driving technology, including robo-limousines. Beyond autonomous driving, Mercedes-Benz uses Nvidia technology in its MO360 digital production system to improve efficiency and quality across its global manufacturing plants.
Qualcomm is stepping up its entry into the semiconductor market for humanoid robots, drawing on its experience in mobile devices and automobiles, and providing integrated AI software packages and other tools designed to simplify development. Park Jae-hyun, vice president at Qualcomm, said at the "Semiconductors Powering Humanoids" conference held at COEX in Seoul on Oct. 16 that the company views humanoids as highly complex automobiles, stating "We already have all the technologies needed for their development." Qualcomm sees humanoids as operating on principles similar to autonomous vehicles, using cameras and other sensors to perceive surroundings, AI to make decisions and motors to execute movements; while autonomous vehicles typically have three to four degrees of freedom (DoF) and are limited to movement on a plane, humanoids have around 60 DoF. Qualcomm has developed SoCs for robotics, low-power wireless communications, robotic OS technology, power and thermal management, and AI development tools; its Dragonwing SoC portfolio integrates CPUs, GPUs and NPUs, including Dragonwing Q2 and Q4 for consumer devices such as robotic vacuum cleaners, Q5 and Q6 for service robots including restaurant serving robots, the IQ8 for autonomous mobile robots (AMRs) and quadruped robots, and the IQ9 for early-stage humanoids. The flagship Dragonwing IQ10 features an 18-core CPU based on the Oryon microarchitecture used in PCs and delivers more than five times the computing performance of the IQ9; Qualcomm said its low-power SoC design expertise addresses power consumption and heat generation in enclosed, battery-powered environments. The company also offers Wi-Fi 7 and 5G communication solutions to control hundreds of robots, Linux-based real-time control technology, and software offerings including Qualcomm AI Stack, Qualcomm AI Hub, SDKs, MLOps and AI Data Flywheel.
Japanese semiconductor company Renesas is accelerating its expansion into the physical AI market, having recently established a dedicated physical AI team within its user experience (UX) organization to provide semiconductors and solutions needed for humanoid robot development. Renesas director Yang Tae-young made the remarks at the "Semiconductors Powering Humanoids" conference held alongside the Semiconductor Exhibition (SEDEX) at COEX in Seoul on Oct. 16. Renesas established its UX organization in the second half of 2024; the global organization covers all markets including Japan, consists of three teams responsible for physical AI, marketing and technology strategy, and has 403 employees, including more than 108 in the physical AI team. The physical AI team provides comprehensive robotics development services, including engineering support and system architecture implementation, with offerings covering microcontrollers (MCUs), microprocessors (MPUs), motor control semiconductors and sensors. Renesas has established a laboratory in Beijing, China, to jointly develop solutions with local humanoid companies and develop its own technologies. Its development tools include MPUs equipped with two 64-bit cores, which can be used in autonomous mobile robots (AMRs). Renesas is also expanding its semiconductor portfolio for robotics, supplying both products for controlling robotic joint motors and industrial network communication devices; humanoids account for 8% of revenue from these products, with the share more than doubling annually, and demand is particularly strong in China. The company is also reducing semiconductor package sizes for humanoid applications, and some robotic joints use dual MCUs to maintain safe operation in the event of a malfunction.
Lee Cheol, vice president at Micron, said at the "Semiconductors Powering Humanoids" conference held as part of SEDEX 2026 at COEX in Seoul on Oct. 16 that Micron is preparing edge inference memory (EIM) for physical AI applications and is discussing with major customers the development of products suited to emerging markets including autonomous driving, humanoid robots, AR and VR. EIM is positioned between AI chips and memory to reduce data processing latency and increase bandwidth; it stacks LPDDR on top of a logic die and, unlike PIM, its computing architecture has not been disclosed, and Micron has not disclosed specific performance targets. The company is developing a method of applying EIM to LPDDR6, with industry observers expecting mass production in the second half of 2028. Micron noted that current AI models for robots use around 1 billion to 2 billion parameters, so memory bandwidth requirements are not particularly high, but as more advanced vision-language models (VLMs) emerge, LPDDR alone will become insufficient, requiring a transition to HBM, which Micron expects to eventually be adopted in humanoid robots. Micron expects future high-performance humanoid robots to require approximately 200GB of DRAM and 4TB of storage, compared with 12GB of DRAM and 256GB of storage used in current service robots. The company said it is collaborating with robot manufacturers, chipset companies and hyperscalers from the early design stages.
SEC said on Oct. 16 that it will supply its Semi-Scan Wafer inline X-ray inspection system to a mass-production line operated by a global outsourced semiconductor assembly and test (OSAT) provider, marking the first commercial deployment of the equipment since its development was completed in the first quarter of this year. Initial units are expected to be delivered soon, with supply volumes projected to increase; the equipment is priced at approximately 2 billion won per unit. Semi-Scan Wafer is designed for wafer-level packaging (WLP) production lines and uses nondestructive inspection to detect defects in microbumps and internal bonding structures, and can also be used to inspect HBM stacking processes. SEC said it will use this first commercial order as a foundation to secure additional global customers and plans to develop HBM and advanced packaging inspection equipment into core growth drivers; the company also said it is expanding production lines for the same customer and has completed preparations to increase supply.
Semi-Scan Wafer inline X-ray inspection systemwafer-level packaging (WLP) inspectionHBM stacking process inspectionSEC, global outsourced semiconductor assembly and test (OSAT) providerThe Elec
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SEC, global outsourced semiconductor assembly and test (OSAT) provider
RAONTECH said on Oct. 16 that it signed a memorandum of understanding (MOU) with SN Display on Oct. 15 to jointly develop next-generation microdisplay technology for augmented reality (AR) and virtual reality (VR) applications. The companies will study the feasibility of integrating perovskite color-conversion technology into micro LED and micro OLED displays to achieve ultra-fine pixels and full-color imaging. RAONTECH specializes in microdisplays and driving technology, while SN Display has expertise in perovskite nanocrystals and color-conversion technology. The article notes that microLED displays for AR applications face challenges in integrating red, green and blue (RGB) pixels on a single panel; quantum-dot color conversion enables full-color imaging on a single panel but faces limitations in producing pixels smaller than 4 micrometers (µm), and low conversion efficiency reduces brightness. SN Display's perovskite technology can achieve high color-conversion efficiency even at thicknesses below 0.5 µm and supports fine patterning using semiconductor processes. The companies will evaluate whether the technology can serve as a color-conversion material for microLED pixels smaller than 4 µm, and depending on the research results will also consider expanding their collaboration to jointly developed prototypes and display solutions for AR and VR applications.
Paraguay's Minister of Information and Communication Technologies, Gustavo Villate, said on Thursday that sanctions imposed on him by Beijing over his country's ties with Taiwan would only accelerate joint projects with the island. In a lengthy social media post, he wrote that the relationship with Taipei would 'never be on the negotiating table'. He also suggested that Beijing had acted to protect Chinese telecoms suppliers kept out of Paraguay's networks. The source does not state further impact.
Based on a press release from Texas Instruments, the author describes the RES80A-Q1, a 50-MΩ precision-resistive divider for use at extremely high voltages up to 2,000 V DC, qualified to AEC-Q200—the automotive-grade rating for passive components—with its primary use in high-voltage EV battery packs, where it divides high voltage down so the vehicle battery management system (BMS) can measure it. The device is built on a high-performance analog-wafer process with an insulative SiO2 layer, in an 8-pin SOIC package with nominal body size 7.5 mm × 5.85 mm and creepage/clearance of at least 8.5 mm between high-voltage and low-voltage pins; the measured ratio of each divider is within ±0.1% (maximum) of nominal, cumulative drift over the specified temperature range and aging is only ±0.2% (max), and the lifetime tolerance of an uncalibrated RES80A-Q1 remains within a ±0.3% (max) envelope. The article background-discusses how automotive demands (especially EVs) are pushing passive components to extreme performance, notes that such standard catalog parts can be picked up by non-automotive designs, and raises concerns about repair complexity and a more extended, fragile repair-related supply chain; the article contains no price movement, capacity, or supply/demand data.
According to Tom's Hardware, published 16 October 2026, Chinese startup Langdao Silex (established in 2024 by Tsinghua University's Gas Discharge Plasma Laboratory alumni) demonstrated a prototype EUV light source with over 15W of output power, 90% domestic components, and decent uptime at the 26th China International Industry Fair in Shanghai, without lighting it up. The FlintNano LPP-OXXO system uses laser-produced plasma (LPP) technology with a 1,000W driving laser operating at 1kHz–20kHz, conversion efficiency exceeding 2%, brightness of 100 W/(mm²·sr), continuous operation of over 100 hours, plasma stability of 3% RMS and EUV output power stability of 5%; however, its output remains insufficient for high-volume chip production, and the company has not disclosed whether the 15W is measured at the plasma or at intermediate focus. Per TrendForce, citing various sources, the company will need another three to five years to commercialize its technology. Langdao is also developing the higher-power FlintMicro-LPP EUV source, which has completed proof-of-principle validation, but its output power, conversion efficiency and operating lifetime are undisclosed. A light source alone does not make an EUV scanner; a complete EUV lithography scanner would require further advances in collection/illumination optics, multilayer mirrors, wafer and reticle stages, and system integration.
On the recent investor call, TSMC Chairman and CEO Dr. C.C. Wei said assessed demand exceeds available supply, and the company is responding with new factories, equipment conversions, productivity improvements and flexible manufacturing across technology generations. Third-quarter revenue reached $46.7 billion, and TSMC forecasts approximately 44% revenue growth for 2026 in U.S. dollar terms (a forecast, not an achieved result). Wei described nearly 20 fabrication facilities under development worldwide, including leading-edge manufacturing and advanced packaging projects, and the company expects annual capacity for its N2 technology family to more than double in 2027 (an expectation). Wei said TSMC is expanding 3-nanometer production despite its historical practice of avoiding further expansion once a technology generation reaches its targeted scale. TSMC outlined manufacturing plans in Taiwan, Arizona and Japan, alongside preliminary evaluations in Texas; Wei linked U.S. expansion to customer requests and said manufacturing location can affect pricing. He also acknowledged some shortage in backend packaging capacity, mentioned cooperation with GlobalFoundries, and noted that company teams are examining U.S. data-center construction and electricity availability, since chip deployment depends on functioning infrastructure. Wei also warned that rising component prices and economic uncertainty are challenging consumers and price-sensitive markets.
onsemi and Sungrow announced the integration of onsemi's EliteSiC hybrid power module technology into Sungrow's PowerTitan 3.0 energy storage platform, targeting high-power DC-AC conversion in grid-scale storage installations. According to onsemi, the new architecture improves inverter-level efficiency by 0.4 percentage points compared with the previous-generation platform, supports power conversion units rated up to 450 kW, and achieves peak efficiency exceeding 99.3%. onsemi's analysis indicates that a 0.4% efficiency improvement could save more than 475 MWh annually in a 100 MW battery energy storage installation compared with the previous-generation module. The SiC hybrid technology combines silicon carbide and silicon power devices in a three-level inverter architecture, providing increased power density and improved thermal performance. The companies collaborated on platform development, system optimization, engineering validation, and qualification, and the adoption follows an established strategic relationship between onsemi and Sungrow.
EliteSiC hybrid power modulehigh-density power integrated modules (PIMs)onsemi, SungrowPower Electronics NewsPartnership/M&A