On October 19, 2026, MintNeuro announced a USD 5 million investment round to scale its chip platform for neural devices, planning to grow engineering and commercial teams, bring products to market, support customer adoption, and strengthen its US presence alongside its UK and European base.
German equipment maker Von Ardenne is entering the semiconductor industry with coating technology aimed at panel-level packaging, a segment where the choice among competing panel dimensions remains unresolved. Its tray-based systems can handle different substrate sizes without a new platform, potentially reducing equipment risk as manufacturers and customers worldwide weigh standards for advanced packaging and glass-based processes.
panel-level packagingadvanced packagingglass-based processesVon ArdenneDigiTimes Asia
Tesla's dealings with Samsung and Taiwan Semiconductor Manufacturing Co. (TSMC) are highlighting tensions between chip designers and foundries as demand for AI processors accelerates. An engineer has made allegations including pricing pressure, requests for sensitive information, and the recruitment of Samsung employees for Tesla's Terafab project; neither Tesla nor Samsung has confirmed the allegations.
AI processorsTesla, Samsung and 3 totalDigiTimes Asia
In an exclusive interview with DIGITIMES, Christoph Hensche, president of Zeiss Semiconductor Manufacturing Optics (SMO), said High-NA EUV is ready for mass production, with orders booked through 2027. The report states that surging AI-driven chip demand has extended order visibility for Zeiss, a key supplier of extreme ultraviolet (EUV) lithography optics; demand for 2026 and 2027 is already clearly defined, and production capacity at Zeiss and some other manufacturers is fully booked for the coming years.
High-NA EUV lithography opticsextreme ultraviolet (EUV) lithography opticsZeiss SMO (Zeiss Semiconductor Manufacturing Optics)DigiTimes Asia
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Zeiss SMO (Zeiss Semiconductor Manufacturing Optics)
SK Hynix is strengthening its metrology and inspection (MI) capabilities as the transition toward 3D DRAM architectures and increasingly complex NAND stacking creates new challenges for conventional semiconductor inspection technologies. The source does not state specific measures, timelines, or impacts on capacity or pricing.
CXMT expects to report net profit of CNY131 billion to CNY132.5 billion (approximately US$19.58 billion to US$19.8 billion) for the first nine months of 2026, reversing a year‑earlier loss driven by surging AI computing demand that is causing memory chip shortages and higher prices.
South Korean semiconductor equipment maker Hanmi Semiconductor showcased its high-bandwidth memory (HBM) and AI chip packaging equipment at SEDEX 2026, including the TC Bonder 4 for HBM4 production and the Wide TC Bonder, which is scheduled for launch in 2027 (planned, not yet launched per the source). The company also introduced five 2.5D packaging systems designed to accommodate increasingly large AI chip packages.
TC Bonder 4Wide TC Bonder2.5D packaging systemsHanmi SemiconductorDigiTimes Asia
South Korean ASIC design solutions provider ASICLAND showcased its proprietary AxHub AI chip design and verification platform at SEDEX 2026 and stated that it seeks to accelerate custom chip development and strengthen its advanced process and packaging capabilities through its Taiwan R&D center. The company also disclosed that memory controller projects remain its primary revenue source, supporting its planned expansion into AI chip mass production and overseas markets. These expansion and mass-production plans remain intentions/plans and are not achieved results; the source does not state any cause beyond these stated aims.
AxHub AI chip design and verification platformAI chipmemory controllerASICLANDDigiTimes AsiaCapacity Change
On October 16, the Malaysian government unveiled six semiconductor innovations developed by local companies (six locally designed chips), with combined sales potential of MYR300 million (approximately US$73.5 million). Economy Minister Akmal Nasrullah Mohd Nasir said winning customers and passing industry qualification were still ahead. This move stems from Malaysia's push to shift from chip assembly to owning designs, which has reached the point where it must find buyers.
AUO Chairman and CEO Paul Peng said the company is positioning its growth around artificial intelligence, diversification, and cooperation across the group. As the display technology company marks its 30th anniversary, it will build on three established businesses while seeking fourth and fifth growth pillars through technologies and partnerships, with directions including co-packaged optics and glass core substrates. This is a stated plan; the source does not state investment scale, timetable, or the cause.
Memory prices are reportedly so high, rising by up to RMB 500 per unit. According to a TrendForce repost, some Chinese phone makers are responding by turning to memory chips salvaged from discarded phones via Shenzhen's Huaqiangbei. The source does not state the cause of the price increase.
memoryTrendForce Official (Market Data)Price Movement
Tata's Dholera fab faces customer and shareholder tests; the fab is a planned capacity project, with no reported implementation or completion. Meanwhile, India's semiconductor push is broadening, with packaging, chip services, AI hardware and infrastructure investments accelerating across the country's domestic technology ecosystem. The source does not state the cause.
According to a Wccftech interview with NVIDIA's Vera team reported on 2026-10-19, NVIDIA has chosen a monolithic compute die for its Vera CPU over the chiplet architectures used by major x86 competitors; Vera also features a custom LPDDR5X memory subsystem and NVIDIA's second-generation Scalable Coherent Fabric. As the report explains, unlike traditional cloud workloads that prioritize high core counts and throughput, agentic AI requires strong single-threaded performance, high memory bandwidth, and low latency to execute sequential tasks quickly and keep GPUs highly utilized. The monolithic design allows CPU cores to communicate without crossing boundaries between separate chiplets, reducing data movement latency. NVIDIA says Vera delivers 3.4 TB/s of bisection bandwidth, three times that of the leading x86 processor used in its comparison; Vera delivers 1.5 times the performance of its predecessor, Grace; and for agentic workloads involving sequential tasks such as Python scripting and code compilation, the company claims up to twice the performance of leading x86 processors, with a 1.6-times advantage on a geometric-mean basis. Vera also introduces NVIDIA's Spatial Multithreading technology. NVIDIA initially positioned its Grace CPU primarily as a host processor for GPU systems, but the report states that growing demand for agentic AI and reinforcement learning has prompted a shift toward standalone Vera CPU racks. Separately, according to the Central News Agency, NVIDIA Senior Vice President of Personal Computing Jeff Fisher denied during an interview in Taiwan rumors that NVIDIA plans to discontinue its flagship GeForce RTX 5090 graphics card, calling them untrue and stressing that the RTX 5090 remains a key product that NVIDIA will continue to supply; he acknowledged supply constraints are affecting the global industry, not just NVIDIA, but said the company is doing everything possible to bring products to market. TechPowerUp adds that the RTX 5090 remains difficult to find near its US$1,999 MSRP, with some listings on Amazon and Newegg exceeding US$8,000.
According to Commercial Times, citing institutional investors, Google's TPU v9 project, involving MediaTek, could see its initial tape-out delayed until January 2027 following design revisions, with shipments potentially pushed back to the first quarter of 2028; the November 2026 sampling target remains unchanged, and the production-version tape-out is expected in the second quarter. The report notes that revisions to Google's TPU v9 Core A design, codenamed Humifish... wait, Humufish, have delayed development by approximately three weeks, affecting the Core B and I/O designs handled by MediaTek. According to TrendForce, the chip is expected to adopt Intel's EMIB-T advanced packaging, with substrate yields remaining a key challenge to production scalability and cost competitiveness. Bloomberg, citing sources, reports that ByteDance is nearing an agreement to purchase MediaTek's data center chips, potentially making it MediaTek's second major ASIC customer after Alphabet's Google. Among Taiwanese ASIC design firms: GUC, supported by cloud customers' CPU and ASIC programs, reported record September revenue of NT$7.145 billion, up 97.8% year over year; Alchip posted September revenue of NT$9.979 billion, surging 496% year over year as shipments of 3nm AI accelerators increased. Faraday has obtained Samsung's 2nm process design kit (PDK) to pursue related design opportunities; per Commercial Times, Samsung's 4nm capacity is reportedly fully utilized, prompting some AI ASIC customers to evaluate its 2nm node. Faraday has also completed its design environment setup for Intel's 18A-P and begun offering design services, with plans to pursue more projects in 2027. Commercial Times, citing institutional investors, projects global AI ASIC accelerator shipments to reach 14.1 million units in 2027, up approximately 69% year over year.
Google TPU v9Core A (codenamed Humufish)Core BMediaTek, Google and 11 totalTrendForce
Huawei scientist Huang Yu said at the October 15, 2026 Bay Area Chip Expo that EDA tools pose the biggest challenge to the Tau (τ) Scaling Law. Huawei formally introduced the Tau Scaling Law on May 25, 2026 at ISCAS 2026, and in October 2026 launched the Mate 90 series featuring the Kirin 9050 Pro chip based on LogicFolding technology, marking the theory's transition from concept to commercial product.
Rising memory prices and tightening supply are reportedly pushing some Chinese smartphone makers to turn to salvaged memory chips. According to TechNews, some brands are said to be sourcing memory chips recovered from discarded phones, potentially including used iPhones, through traders in Shenzhen's Huaqiangbei electronics market. Sources say memory procurement costs have surged, with some chips reportedly costing up to RMB 500 more per unit; the Shenzhen local government is also rumored to be offering smartphone brands subsidies of around RMB 300 per unit, leaving manufacturers to absorb roughly RMB 200. Unable to fully pass on the increases, some brands are reportedly cutting production and sales volumes to limit losses. TechNews notes the reported price increases, subsidies, and use of salvaged chips have yet to be confirmed by Chinese authorities or the companies involved, and such chips are largely limited to ultra-low-cost, unbranded smartphones and are unlikely to enter flagship supply chains. As background: TrendForce says AI server demand continues to squeeze DRAM supply, with shortages and price increases expected to persist into 2027; TrendForce projected global smartphone production would fall 14% year over year to approximately 1.07 billion units in 2026, a forecast revised upward due to earlier-than-expected purchases and restored production. Caijing's April investigation found a Shandong recycler purchased around 1,000 discarded phones in March and dismantled more than 600 for potential chip resale, with some nonfunctional devices reportedly fetching more than RMB 100 each; some recyclers preferred Android phones from OPPO, vivo, and Huawei, while sources told TechNews that Huaqiangbei traders primarily purchased used iPhones. A September STAR Market Daily investigation found refurbished chips can serve lower-end applications such as automotive accessories, IoT devices, and overseas refurbished phones, but analysts cautioned that salvaged chips face yield losses and compatibility risks, and recycling premiums could quickly disappear if major chipmakers adjust production.
According to a technical analysis from the SPIE Digital Library, conventional extreme-ultraviolet (EUV) lithography uses a 13.5-nanometer wavelength projected through reflective optics with a custom photomask per layer, and can print extremely small features at high throughput, but every new design requires an expensive mask set. Maskless EUV lithography proposes storing patterns not on a physical mask but using a programmable array or another rapidly addressable optical element to write digital patterns directly onto the wafer, avoiding the serial point-by-point speed bottleneck of electron-beam lithography, shortening iteration cycles and lowering the fixed cost of small-volume production. The article states the approach is not a simple replacement for EUV scanners or e-beam tools: EUV radiation is strongly absorbed by most materials, so the system must operate in vacuum with specialized reflective optics; a programmable pattern generator must maintain nanometer-scale placement accuracy under EUV exposure, control heat and contamination, and avoid adding defects; photoresist stochastic variation at very small dimensions and real-time delivery of vast pattern files are further challenges. First successful applications would likely be selective—rapid prototyping, low-volume advanced devices, research, mask repair, or particular critical layers—rather than a wholesale takeover of high-volume lithography. This is background technical analysis; no specific manufacturers, volumes, prices or orders are cited.
Kulicke & Soffa reported fiscal Q3 2026 net revenue of $330.4 million, up 123% year-over-year, with gross margin of 47.8% and non-GAAP EPS of $1.20, beating expectations. The company guided to roughly $375 million for Q4 fiscal 2026 ending October 3, 2026, citing strengthening demand across semiconductor, memory, automotive, and industrial markets.
According to Tom's Hardware, published 18 October 2026, a project-by-project audit shared by SemiAnalysis on 17 October 2026 finds that more than 300 local US data center construction moratoriums have had limited impact on planned buildouts: only about 2.3 GW of the roughly 21 GW of data centers in moratorium areas (about three projects) is likely to be delayed, and this figure excludes the Texas Commission on Environmental Quality (TCEQ) pause. The firm forecasts a total of 38 GW of US data center IT capacity coming online in 2027, more than double that of 2026; of that, 22 GW is under vertical construction and the other 16 GW is mostly financed with site work being done. The enacted local moratoriums cover about 20 GW, with only about 1.5 GW of it delayed; New York's pause adds 0.8 GW more. As of September, the firm tracked more than 400 local instruments across 17 states, the enacted ones including a few permanent zoning bans; this summer New York, Texas, Pennsylvania, and Oregon acted within under two months. Reasons given for the limited effect include that moratoriums do not revoke existing approvals, short ones may expire before later projects need approval, litigation or equipment lead times may already set the schedule, and capacity already under construction or fully permitted is out of reach. Texas Gov. Greg Abbott told the TCEQ to issue no permits for data center projects, and law firm Bracewell expects the pause to last until ERCOT finishes its review in mid-December; the TCEQ's compliance report to Abbott's office is due Monday.
SEMI Americas President Joe Stockunas stated at SEMICON West 2026 on Oct. 15 that the industry would like to see investment tax credits for fab construction extended to supplier infrastructure and is working to make it happen. He noted announced investments exceed $800 billion and there are $330 billion in announced investments in Phoenix.