A background technical analysis notes that AI processor performance continues to improve, but memory bandwidth is growing more slowly, making data supply a major constraint on AI chip performance and energy efficiency. Efforts to shorten the distance between memory and compute units and increase die-to-die interconnect density are driving advances in HBM, advanced packaging and 3D integration. The article is an industry trend discussion and involves no specific manufacturer, price movement, capacity event or policy action.
Samsung Electro-Mechanics (SEMCO) has signed a long-term supply agreement worth KRW360.487 billion (approximately US$260 million) with a major global company for memory packaging substrates, with shipments scheduled to begin in 2027. The company did not disclose the customer or specific application. The deal expands its long-term contract coverage from multilayer ceramic capacitors (MLCCs) and silicon capacitors into substrates; per the title, its long-term contracts total KRW4.3 trillion.
According to a repost from TrendForce, Samsung has reportedly begun producing its 2nm Exynos 2700, with output potentially rising over 10% from the Exynos 2600 (no exact date given in the source). The chip is expected to be used in the Galaxy S27's standard and Plus models. This is a reported claim, and the output increase is a potential expectation rather than an achieved result; the report also raises the question of whether the chip could help revive Samsung's non-memory business.
2nm Exynos 2700SamsungTrendForce Official (Market Data)Capacity Change
Michael Dell, Dell's chairman and CEO, told The Wall Street Journal that he does not think the memory shortage is anywhere near over and said things will get worse in 2027 (next year), as the AI data center buildout keeps soaking up DRAM and HBM supply. According to him, the bottleneck for Dell is not demand: the company is sitting on roughly $95 billion worth of undelivered AI server orders, the largest backlog in its history, and memory is what is holding those shipments back, since AI accelerators need plenty of HBM while the servers around them still rely on conventional DRAM. Relief also looks far away: new memory fabs take around four years to build, so Dell apparently does not expect meaningful new supply until 2029 or 2030. That aligns with Micron's CEO, who recently said supply will be much tighter in 2027 and 2028 than this year, and SK hynix's CEO similarly expects the memory shortage to last through 2030. Dell is reportedly coping by buying DRAM only when final assembly is close and by locking in long-term supply agreements, though there is no word on how much of that applies to its consumer products.
The article lists ten leading Chinese semiconductor companies: SMIC is China's largest foundry with roughly $9.3 billion revenue in 2025; CXMT is the leading domestic DRAM maker with revenue surging past $8 billion; Huawei HiSilicon is the top chip design house (Kirin, Ascend AI, etc.); JCET Group is China's largest OSAT/packaging & testing firm; NAURA Technology Group is a leading semiconductor equipment maker; Hua Hong Semiconductor/Huahong Group is a major pure-play foundry focused on specialty/mature nodes; YMTC is the main domestic 3D NAND flash producer; Will Semiconductor (OmniVision) is a major image sensor and analog/design player; Tongfu Microelectronics is a second-tier but large packaging & testing company; and Cambricon Technologies or Hygon Information are leading AI accelerator or x86-compatible server CPU players respectively. The source does not state the cause, and no price movement, capacity change, or policy event is reported.
SMIC, CXMT and 11 totalElectronics Weekly
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SMIC, CXMT, Huawei HiSilicon, JCET Group, NAURA Technology Group, Hua Hong Semiconductor, YMTC, Will Semiconductor, Tongfu Microelectronics, Cambricon Technologies, Hygon Information
This is Part 4 of SK hynix's AI Ecosystem article series, published October 21, 2026, written by Raja Koduri, founder and CEO of OXMIQ Labs, who previously led GPU and AI accelerator architecture development at Apple, AMD, and Intel; the theme is that the semiconductor paradigm is shifting toward memory. The article argues that AI performance is shifting from pure compute to data movement and placement, with memory bandwidth and hierarchy dominating costs; as transformers grow, data reuse declines and systems repeatedly read from DRAM or HBM, and in low-latency, small-batch inference memory bandwidth can limit performance. It states that HBM vertically stacks multiple DRAM dies connected via through-silicon vias and an interposer, reducing the compute-to-memory distance from centimeters to millimeters; the author says he was involved in developing an HBM-based GPU at AMD in 2015 and later led development of Intel's Ponte Vecchio, which integrated 47 chiplets and four HBM2e stacks into a single package. The article also covers hybrid bonding (fine-pitch direct copper-to-copper bonding replacing microbumps) and processing-in-memory (PIM), noting PIM can reduce energy consumption by 10 to 100 times depending on the workload, while facing challenges such as thermal management. This is an opinion/background analysis piece, not a report of an actual price, capacity, inventory, or supply-demand event.
According to Reuters, as AI-driven demand extends from DRAM to NAND and competition from China's YMTC intensifies, Samsung and SK hynix are planning upgrades at their Chinese NAND facilities: Samsung plans to shift its Xi'an plant from roughly 200-layer to 286-layer V9 NAND under an internal project dubbed "Monami"; SK hynix, already authorized to produce up to 240-layer NAND in Dalian, is reportedly planning to upgrade from its current 192-layer technology to 240 layers or more, and may seek U.S. approval for R&D on 300-plus-layer technology. TrendForce estimates China accounts for roughly 30–35% of Samsung's total NAND output and an even higher 40–45% for SK hynix. U.S. export restrictions remain a major hurdle: both chipmakers must obtain annual licenses to install U.S.-made equipment at their Chinese plants, and Washington indicated in 2025 that it would not approve technology upgrades or capacity expansions there; both companies confirmed to Reuters that upgrades were underway in close coordination with Washington but declined to disclose detailed production plans. On competition, YMTC's NAND lineup is dominated by 160- and 232-layer products, it is already producing 294-layer chips in limited volumes and plans to push beyond 300 layers. Separately, per Seoul Economic Daily, Samsung has shifted roughly 60% of its V-NAND capacity to V9 (286 layers), is ramping shipments to NVIDIA, has begun mass production and supply of V10 NAND, and is accelerating development of next-generation V11 targeting around 500 layers; per Bloter, SK hynix is stepping up its shift to 321-layer NAND, which became its largest NAND production segment in 2Q26, with roughly half of its domestic NAND capacity expected to transition to 321-layer products by year-end.
NAND flashSamsung, SK hynix and 3 totalTrendForceCapacity Change
According to TrendForce's latest memory spot price trend report (published 2026-10-21), the DRAM market showed mixed signals this week: DDR5 supply remains tight and suppliers are clearly reluctant to sell, so even though some buyers are willing to raise target prices they still cannot secure allocation, while intermittent inquiries failed to spark price-chasing momentum. For branded DDR4 chips, downstream module houses are strictly controlling capital and inventory, limiting actual order releases and keeping trading sentiment subdued. The average spot price of mainstream chips (i.e., DDR4 1Gx8 3200MT/s) rose 0.84% to US$46.357 this week (October 20). In NAND flash, weak demand from the largest buyer, module houses, combined with persistently high inventory levels, kept spot trading volume sluggish; sellers believe price cuts may not stimulate demand effectively, resulting in limited willingness to lower prices, so spot prices stayed in a narrow trading range. Spot prices of 512Gb TLC wafers dropped 1.28% this week (October 19), with average quotations at US$18.592.
According to a Fortune profile of Xbox CEO Asha Sharma, Microsoft's next-generation Xbox console, codenamed Project Helix, has internally been projected to cost consumers between $1,200 and $1,800 unless Microsoft decides to subsidize it; Microsoft hasn't confirmed any pricing, and a subsidy could bring the final number down a bit, but Fortune puts Xbox's profit margin at around 3%, leaving limited room. For reference, the current Xbox Series X with a disc drive sells for $799.99, and that is after recent price hikes. Sharma reportedly plans to release a next-gen handheld by the 2027 holiday season, followed by the console in time for the 2028 holidays; according to people familiar with the matter, Helix engineering deadlines have been moved up by at least several months, putting extra pressure on development teams. The handheld has also caused friction inside Microsoft: Windows leaders reportedly wanted it to run a trimmed-down version of Windows Home, while Sharma's team wanted its own software for better gaming performance, and a senior Xbox executive reportedly threatened to scrap the handheld rather than ship the Windows build, though Xbox now seems to be steering the OS. Sharma says the teams still work together, noting, "We can't build Helix on our own." Separately, memory makers expect supply to get even tighter in 2027 and 2028, while rival Sony also struggles with rising costs, so a cheap next-gen console looks unlikely from either side.
According to Reuters, Elon Musk said during a SpaceX conference call that his semiconductor manufacturing venture, Terafab, is targeting volume production in 3Q28, though he acknowledged that either 3Q or 4Q remains possible, describing the timeline as "very aggressive" given that advanced logic chip fabs in the U.S. typically take three years or more to build. Before volume production, Terafab aims to produce its first functional test chip using SRAM circuits around May or June 2027 at its Austin research facility. Equipment supply remains a key challenge, particularly from ASML and U.S. suppliers such as Applied Materials and KLA; asked whether SpaceX had ordered EUV lithography systems from ASML, Musk did not answer directly but thanked ASML and other suppliers for accelerating equipment deliveries. Per Reuters, ASML expects demand to outstrip supply through 2028 despite plans to expand EUV production capacity. According to The Elec, Tesla and SpaceX are in talks with South Korean semiconductor materials, components, and equipment suppliers to establish Terafab's supply chain, with several companies signing NDAs; HPSP and Hanmi Semiconductor remain the only two Korean equipment suppliers publicly linked to Terafab, and Terafab is reportedly seeking prices even lower than those offered by Chinese competitors. On manufacturing partners, TSMC Chairman and CEO C.C. Wei confirmed ongoing discussions but stressed that any fab involving TSMC must be operated by the company, contrasting with Musk's October 7 remarks that his companies would build and operate Terafab, potentially allowing TSMC to sublease space without an operational role; meanwhile, per Reuters citing Bloomberg, Intel CEO Lip-Bu Tan said the company would remain involved in Terafab.
SRAM test chipadvanced logic chipsEUV lithography systemsTerafab, Tesla and 10 totalTrendForceCapacity Change
Applied Materials held the unveiling of its EPIC Center on October 12, 2026, in Sunnyvale, CA, with President and CEO Gary Dickerson and the founding partners in attendance. The article states that as AI models grow and applications expand, the challenge is no longer simply to make individual chips faster or more efficient, but to build complete computing systems that deliver greater performance, move more data and consume less energy while bringing new technologies to market faster. The event brought together perspectives from SK hynix, TSMC, Micron, Intel, Samsung, Broadcom, NVIDIA and Qualcomm alongside Applied Materials, with the common conclusion that advances in one part of the system increasingly depend on progress in others. AI computing places intense demands on processors, memory, interconnects, advanced packaging and power efficiency; as AI workloads grow, moving data between memory and compute becomes a major constraint on performance and energy consumption, making HBM, closer memory-logic integration and new packaging approaches central to system design. For interconnects, large AI systems distribute workloads across multiple processors, making communication speed, latency and energy use increasingly consequential, and approaches such as advanced chip integration and co-packaged optics require progress in materials, processes, packaging and system architecture together. Thermal management adds further complexity. The article argues that no single company can solve these problems alone, that earlier collaboration can expose constraints sooner and align development priorities, and that Applied Materials' EPIC Center is designed to bring industry partners together to work on materials, processes and equipment relevant to future semiconductor technologies.
processorsmemoryhigh-bandwidth memory (HBM)Applied Materials, SK hynix and 9 totalSemiWiki
Nexilumen, a spin-off from Fudan University, has made new progress in Micro LED optical interconnects, increasing aggregate bandwidth through space-division multiplexing (SDM) and wavelength-division multiplexing (WDM). Its 16-channel Micro LED array achieved a data rate of 37 Gbps; in the SDM approach, a 4 × 4 green Micro LED array integrating 16 independently driven pixels delivers an average data rate of approximately 2.3 Gbps per pixel, with all 16 channels operating simultaneously to reach the 37 Gbps aggregate rate. For WDM, Nexilumen integrated violet, blue, and green InGaN Micro LEDs alongside yellow and red hybrid Micro LED/quantum-dot pixels on a single silicon substrate; the 320 × 290μm area accommodates five independently driven wavelength channels, achieving 18.66 Gbps across the five channels, corresponding to a data-rate density of approximately 201 Gbps/mm² based on the total emitter-chip area. In separate research previously published in Nature Communications, the company demonstrated a transmitter energy efficiency of 0.056 pJ/bit at a communication rate of 1.5 Gbps through communication-link and algorithm optimization. At CIOE 2026, Nexilumen showcased long-wavelength InGaN Micro LEDs, 405 nm high-speed light sources, and multichannel parallel optical links: its long-wavelength devices achieved an electro-optical modulation bandwidth of 2.85 GHz at a current density of 6.25 A/cm², while its 405 nm light source maintained a modulation bandwidth above 3 GHz across the full operating current range. The company plans to develop and validate a prototype optical interconnect system targeting 1.6 Tbps and is focusing on Micro LED light sources, drivers, and system solutions for short-reach interconnects, including co-packaged optics (CPO) and chip-to-chip optical I/O. In July 2026, Nexilumen announced the completion of a seed funding round worth tens of millions of yuan, jointly backed by Fudan Innovation and Furuong Investment.
Micro LED optical interconnectgreen Micro LED arrayInGaN Micro LEDsNexilumenTrendForce
According to Chosun Biz, Samsung Electronics reportedly began wafer production for Exynos 2700 earlier this month, with output potentially increasing by more than 10% compared with Exynos 2600, in a bid to revive its non-memory semiconductor business. Exynos 2700 is expected to power the Galaxy S27 series in 2027, primarily in the standard and Plus models, with possible adoption in a new Pro variant; however, the flagship Ultra model is increasingly likely to rely exclusively on Qualcomm's Snapdragon processor, and the final chip configurations remain undecided. Exynos 2700 reportedly adopts Samsung Foundry's second-generation 2nm process, SF2P, which targets 12% higher performance, 25% lower power consumption and an 8% reduction in chip area compared with the first-generation SF2 used for Exynos 2600, and it is reportedly the first chip to enter mass production using SF2P; per The Bell, Samsung has shared production plans with key partners, although initial wafer starts remain limited. The report notes that the extent of the non-memory recovery will depend on Exynos 2700's mass-production yields and adoption across the Galaxy S27 lineup; Samsung Foundry's 4nm lines are reportedly operating at nearly full capacity while it continues seeking additional customers for its 5nm process. Additionally, per TrendForce, mobile DRAM prices are expected to continue rising in 4Q26, albeit at a slower pace, as suppliers shift capacity toward higher-margin server products, making the price competitiveness of Samsung's in-house processors increasingly important.
Innodisk announced it is expanding its DDR5 portfolio with an 8000 RDIMM for compute-intensive applications such as edge AI and enterprise servers. The modules deliver data transfer speeds of 8000 MT/s, which is 11.1% higher than the previous generation, and offer capacities ranging from 16GB to 64GB. They integrate TVS (transient voltage suppressor) diodes and eFuse protection to help mitigate the risk of system failure caused by voltage fluctuations and abnormal power conditions, and feature 30μ” gold fingers and anti-sulfuration protection for contact durability and corrosion resistance. Specifications include 288pin, x80 bus width, 1.1V voltage, and 0°C~95°C (Tc) operating temperature. Innodisk also flags that it will roll out additional DDR5 8000 modules in Q1 2027, including CUDIMM, CSODIMM, ECC CUDIMM, and ECC CSODIMM offerings.
Infineon Technologies AG announced that it is expanding its PSOC Control family with the launch of the PSOC Control C3 Main Line PSC3M/P6 microcontrollers (MCUs). The Arm Cortex-M33-based MCUs run at up to 180 MHz and target multi-motor control and power conversion systems, efficiently driving up to four brushless DC motors in sensored or sensorless configuration with a single MCU, for applications including industrial drives, drones, smart home, home appliances, renewables, robotics, telecommunication servers, datacenters, and digital healthcare. On security, the MCUs are compliant with post-quantum cryptography (PQC) requirements for firmware protection outlined in CNSA Suite 2.0, support PSA Level 3, and help compliance with the Cyber Resilience Act (CRA). Additional features include wide-bandgap readiness, on-chip OpAmps, USB and I3C interfaces, and the ModusToolbox Power Suite and Motor Suite GUI software ecosystem. Steve Tateosian, SVP and General Manager, IoT, Consumer and Industrial MCUs at Infineon, said the next-generation MCUs are designed for multi-motor control and power conversion systems requiring high performance, efficiency and advanced security. Company background: around 57,000 employees worldwide (end of September 2025) and revenue of about €14.7 billion in the 2025 fiscal year (ending 30 September).
PSOC Control C3 Main Line PSC3M/P6 microcontrollers (MCUs)Infineon Technologies AGEE Journal
In an official blog post on Oct. 19, Salil Raje, senior vice president and general manager of AMD's Adaptive and Embedded Computing Group (AECG), said that what robot manufacturers demand most is not the highest AI computing performance, but combining advanced AI models with real-time control capabilities that precisely execute computational results within required time limits, arguing that physical AI performance evaluation should shift from raw computing power toward real-time control and system-wide reliability. AMD proposes a heterogeneous semiconductor architecture: the robot's brain uses a Kria AI system-on-module (SOM) based on Ryzen AI Embedded X100 series processors, Versal Adaptive SoCs serve as the spine, Zynq SoCs control the joints, and Spartan FPGAs handle sensor functions; this architecture forms the basis of AMD's Kria AI solutions for robotics. In third-party testing cited by AMD, the Kria AI SOM achieved AI inference times of less than 0.1 seconds and supported 8,000 control decisions per second; in open navigation benchmark tests, a Ryzen AI Embedded configuration delivered up to 3.4 times greater control timing reliability and up to 1.6 times more available computing headroom than Nvidia's Jetson T5000; and according to Mimic analysis, the configuration supported up to 2.3 times as many simultaneously operating autonomous agents. Foundation Robotics and Generative Bionics are designing products using AMD's Kria AI solutions.
Kria AI system-on-module (SOM) based on Ryzen AI Embedded X100 series processorsVersal Adaptive system-on-chips (SoCs)Zynq SoCsAMDThe Elec
At Synaptics Tech Day 2026 on October 20, 2026, Synaptics introduced what it calls a new class of microcontroller (xMCU), the Astra SR200 series, positioned between traditional MCUs and application processors. The family includes three pin-compatible members: the SR210 (200 GOPS, for voice and sensing), the SR230 (300 GOPS, for vision and display systems), and the SR250 (400 GOPS, for multimodal applications). The SR200 is built around an Arm Cortex-M85 processor running at up to 800MHz plus a lower-power Cortex-M52, with up to 8MB of SRAM and up to 256MB of high-bandwidth custom DRAM. Its Torq NPU subsystem combines Synaptics' own Torq T2 with Google Research's Coral NPU; the Coral NPU is based on the open RISC-V architecture, and Google Research is making the architecture available as open-source IP. Synaptics was the first commercial adopter and integrator of Google's Coral NPU IP, incorporating the first-generation architecture into its Astra SL family in 2025; the SR200 series incorporates the second-generation Coral NPU, which adds SIMD vector processing to improve performance and energy efficiency. Within the joint Coralboard development platform family, the Coralboard SL, based on the Astra SL2619 processor (dual Arm Cortex-A55 cores and a 1 TOPS NPU subsystem combining Torq T1 with first-generation Coral NPU), is now generally available through DigiKey following an initial limited release; the Coralboard SR, based on the new SR250, is being demonstrated in samples at Tech Day 2026, with broader availability anticipated in the first half of 2027. The Coralboard design incorporates a production-grade system-on-module (SoM) from Poland-based embedded hardware specialist GRINN. Google Research has further enhancements to the Coral NPU architecture in the pipeline, and Synaptics plans to continue introducing new processors and development boards as the technology evolves.
edge AI microcontroller (xMCU)neural processing unit (NPU) subsystemdevelopment boardSynaptics, Google Research and 3 totalEE Journal
According to Tom's Hardware on 20 October 2026, electronics hobbyist Blighted Agent converted a SK hynix 2x 16GB DDR5-5600 SODIMM (laptop memory) kit bought on Facebook Marketplace for $120 into a 2x 16GB DDR5-7800 desktop kit, claimed to be worth around $1,000, by removing the memory ICs with a hot air station, adding 0.45mm leaded solder balls, mounting them on blank DDR5 desktop PCBs bought from AliExpress for around $16 each, and adding heatsinks for around $18; the total bill of materials came to $175. The modules used what he believed to be SK hynix A-die ICs. The finished DIMMs were recognized in an Asus ROG Maximus Z790 Apex Encore motherboard as two 'SK hynix 16,384MB 5600MHz' modules, and after tuning ran rock-steady at DDR5-7800 CL38 and 1.40V, verified by 90 minutes of stress testing; the hobbyist notes the rework carries many risks and he lacks testing equipment to locate a faulty individual IC. On prices, he checked eBay U.S. where the best deal for a used 32GB kit was $320, while the best price for a new 32GB DDR5-6000 kit seemed to be $449 at the time of writing. The article also notes Russian enthusiast VIK-on completed a similar project earlier this year, flashing custom firmware for auto-detected 6400 MT/s XMP support. The article states that in late 2026 DDR5 RAM continues to be too expensive; the source does not state the cause.
According to industry sources on Oct. 20 (year not stated in the source), Samsung Electronics plans to manufacture its next-generation M2800 series mobile modem chips using a 2nm process, transitioning from the 4nm technology currently used for external modems; the external 5G modem M2800 is scheduled to complete development in 2027, is intended for the Galaxy S28 series due for release in 2028, and will be paired with the next-generation Exynos 2800 in a two-chip configuration. Moving modem production to 2nm will free up capacity on Samsung's 4nm lines, which the company plans to redirect toward HBM production; an industry official said "Samsung Foundry is converting much of its 4nm production capacity to HBM manufacturing," with the 4nm process used for the base die containing control circuitry at the bottom of an HBM stack. Samsung will continue using 4nm through the M2700, an external modem designed to accompany the Exynos 2700 in the 2027 Galaxy S27 series; the Shannon 5410 external modem used in the 2026 Galaxy S26 (also marketed externally as the Exynos Modem 5410) was also manufactured on a 4nm process, with Samsung equipping the South Korean versions of the Galaxy S26 and S26+ with the Exynos 2600 and Shannon 5410 combination while US models used Qualcomm's Snapdragon 8 Elite Gen 5. An industry official said Samsung has discontinued the Shannon modem brand and replaced it with the M-series. Although the M2700 uses the same 4nm process, it reportedly received favorable evaluations in internal testing by Samsung's Mobile eXperience (MX) Business, unlike its predecessor; Samsung improved power efficiency and data transmission speeds through design and software changes, reduced the chip's area by approximately 4% using optical shrink, and moved the modem from 3GPP Release 17 to Release 18 with improved NTN satellite communication capabilities. The official said the existing Shannon 5410 lagged behind competing products in idle power consumption and under standard power measurement conditions, and that the M2700, following voltage adjustments and other improvements, reportedly delivers performance comparable to or better than rival products. The 2nm transition and 4nm capacity conversion are plans; the source does not confirm their implementation.
mobile modemHBM base dieSamsung ElectronicsThe ElecCapacity Change
TrendForce reposted news stating that, despite concerns over Chinese competition and AI spending, institutional investors remain bullish on the memory industry. Q4 (4Q26) DRAM contract prices are projected to rise approximately 20% QoQ, though the pace of increases may be slowing; the source cites AI demand and tight supply ('AI Demand, Tight Supply'). This is a projection, not an achieved result.
DRAMTrendForce Official (Market Data)Price Movement