AMD shares how it can retain 95% of server performance with just half the DRAM, sidestepping memory shortages with MEXT

What happened

According to a report published 11 November 2026, AMD detailed its predictive memory engine MEXT: the technology offloads cold memory pages to flash storage and uses AI models, with a primary transformer-based LLM, to serve pages before they are needed. AMD and MEXT founder Gary Smerdon claim it can cut the physical DRAM required in a server by 20% to 75% depending on the application and performance target, with the missing memory still registering as installed DRAM to the OS. In internal workloads such as Synopsys PrimeTime, AMD says it achieves 95% of full-server performance at 50% DRAM capacity and 80% at 25% capacity; in a 3-node Azure cluster with 5th-gen EPYC CPUs running the Spark SQL workload from the TPC-DS benchmark, MEXT offers 99% of full-cluster performance at 50% DRAM capacity; for agentic AI, across a five-agent concurrent geomean AMD claims 99% performance at 50% memory capacity and 85% at 25%, and 90% and 88% for 50% and 25% capacity respectively with a "memory-hungry" agent. AMD has deployed MEXT internally on 145 servers and says it will expand to 2,000 servers next year (2027 per the headline); it has also announced a partnership with HPE to bring MEXT to customers. The rollout is currently in phase 1, with some EPYC Venice servers carrying a "MEXT Ready" badge and a dedicated NVMe drive or bay; phase 2 will bring MEXT licenses and the RAM View application to these servers, but AMD has not said when phase 2 will begin. MEXT will be sold as a license bundled with RAM View, is EPYC-exclusive for now, and AMD says it trains in under a second when first deployed, operates on one EPYC core without a GPU, and continually trains as the workload progresses. The report frames this against an AI-driven DRAM pricing surge affecting enterprises, but notes AMD has not shared the benchmark footnotes and has not said when MEXT will be ready for deployment beyond AMD's walls.

Impact and signal

Affected components and suppliers

Source and time

Source: Tom's Hardware · 11/11/2026 · View original source