AMD: Where we're going we don't need (as much) DRAM
What happened
According to the source, AMD is promoting software technology it obtained through its acquisition of Mext (acquired back in June; the source gives no year), claiming that buying a Mext license enables up to 99 percent of the performance with half the DRAM on Epyc servers, by using AI models to predictively load memory pages from cheaper NVMe flash storage back into DRAM before they are needed, transparently making flash appear as DRAM. According to former Mext CEO and now AMD CVP of business development Gary Smerdon, replacing costly RDIMMs with flash storage could cut enterprise server costs by as much as 83 percent; of the initial 145 systems the software has been deployed on so far, he estimates customers have already saved $5 million in avoided DRAM costs. He cited a Meta research paper showing that between 50 and 80 percent of memory pages had not been touched in five minutes, ten minutes or longer, and noted that flash is 50x cheaper per bit and 30x lower power per bit but 500x slower. On performance: in tests against Synopsys' PrimeTime EDA suite, half the memory can be offloaded to flash while achieving 95 percent of DRAM performance; in AMD's tests, with 25 percent DRAM and 75 percent flash, performance fell to 80 percent of the DRAM-only baseline; in Apache Spark scenarios, AMD's Mext team says it is seeing 99 percent of the performance even after replacing half the DRAM. The software will be exclusive to AMD hardware and offered as a license sold through OEM partners; Linux systems require only a kernel driver, a separate RAM View application is offered to help enterprises decide which systems to enable; no GPU is required, but in virtualized environments the software requires one core per VM or VPC. AMD is currently in the first phase of its rollout, working with OEMs like HPE to make systems so-called Mext ready; in the second phase it aims to begin selling licenses and shipping Epyc platforms with RAM View preinstalled. AMD is betting customers will accept some performance trade-off for substantial DRAM savings, as memory remains constrained thanks to the AI datacenter buildout.
Impact and signal
Affected components and suppliers
Source and time
Source: The Register · 11/11/2026 · View original source
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