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A closer look at Verano, AMD's first step toward a Zen-based superchip to rival Nvidia's Vera Rubin

What happened

AMD's unreleased Verano processors (planned status) are designed specifically to power AMD's next generation of GPU servers; Madhu Rangarajan, CVP of AMD's compute and enterprise AI products business, described them at a press event in Las Vegas as the first step toward something resembling Nvidia's Vera Rubin superchips: 'Verano is really designed for an integrated CPU+GPU rack scale solution,' with a Verano+GPU solution competing against Vera+Rubin. The chip features six CCDs for a total of 72 high-frequency cores clocking to 5.3 GHz, or 192 density-optimized cores clocking to 4.1 GHz; it has an entirely custom pair of I/O dies with four LPDDR5X memory controllers, currently being validated for 24 channels of memory at up to 8,533 MT/s. Peak theoretical memory bandwidth tops out at around 800 GB/s — about half of AMD's top-specced Venice parts and about 66 percent of Nvidia's Vera — while LPDDR buys a 30 to 40 percent reduction in power consumption compared to RDIMMs. In its first incarnation Verano won't be socketed, using a soldered BGA, and its memory uses the same SOCAMM2 modules as Nvidia's Vera-Rubin. Verano's xGMI links top out at 112 Gbps per lane versus Venice's 64 Gbps (PCIe 6.0 level), near PCIe 7.0 bandwidth. The article says the part starts shipping next year (no absolute date given), with more info expected closer to the MI500X's debut next year; AMD has not disclosed the CPU-to-GPU ratio for Verano, and the GPUs are assumed to be MI500X. AMD does not expect Verano to replace Venice in every AI rack; its Helios rackscale systems will feature 18 96-core Venice CPUs paired to 72 Instinct MI455X GPUs.