NuAxiSemiconductor trade intelligence

High-NA’s Obituary Was Premature

What happened

The article argues that obituaries for High-NA EUV lithography were premature. Intel provides the strongest evidence: in July, ASML announced that selected layers of a subset of Panther Lake processors were being manufactured using High-NA EUV, dual-qualified against conventional EUV with yields matching the existing NXE platform; this does not mean every Panther Lake processor uses High-NA or that Intel 18A depends on it. By September, Intel and ASML reported more than one million wafers processed across certification, research, development and production, though the figure is not one million customer production wafers; the companies said overlay, throughput and availability were meeting Intel's expectations. The underlying attraction is that increasing numerical aperture from 0.33 to 0.55 improves resolution for finer features, and where it replaces multiple exposures and associated steps the economics can extend beyond scanner throughput, though whether benefits materialise is specific to each layer and process. Complications remain: High-NA's anamorphic optics halve the exposure field with today's mask format, imposing layout constraints or stitching on large designs—Intel says current masks remain usable through appropriate floorplanning and its stitching solutions; longer term, ASML and TSMC are pursuing 12-inch photomasks, with a pilot line targeted for 2031 and advanced-node production readiness for 2033. Customer adoption is staggered: TSMC intends to introduce High-NA into advanced-node volume manufacturing starting in 2030, with chairman and CEO C.C. Wei emphasising on its October earnings call that maturity and reasonable cost are conditions for adoption; Samsung plans to introduce High-NA into DRAM volume manufacturing by 2028. Existing EUV will continue improving and competing for layers, and High-NA must win each allocation through measurable manufacturing advantages, leaving its commercial pace open.