Analog in-memory computing advances to 12 nm

What happened

TetraMem has completed tapeout of the MLX300, a 12-nm analog in-memory computing (A-IMC) SoC based on multi-level RRAM technology. The chip was developed using Synopsys EDA software delivered through Synopsys Cloud FlexEDA, extending multi-level RRAM-based AI chip development to advanced FinFET nodes. The MLX300 tapeout follows TetraMem's MLX200/MLX200M multi-level RRAM A-IMC SoCs, which completed full-mask tapeout in 2026 on a commercial 22-nm process. The MLX300 uses TetraMem's architecture in a single-chip accelerator for audio, vision, and smaller language models, supporting up to 64 million INT4 parameters on-chip without external DRAM for model-weight storage; TetraMem says the SoC targets energy efficiency exceeding 50 TOPS/W.

Impact and signal

Affected components and suppliers

Source and time

Source: EDN · 10/28/2026 · View original source