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Japan approves TSMC plan to make 3-nanometer chips at its second Kumamoto fab

What happened

Japan's Ministry of Economy, Trade and Industry (METI) on Oct. 16 approved a revised plan from Taiwan Semiconductor Manufacturing Co. (TSMC) to build 3-nanometer logic chips at its second fab in Kumamoto Prefecture, on the southern island of Kyushu. 3nm is one of the most advanced chip processes in commercial production. The plan replaces the 6nm and 12nm production approved in February 2024. The source does not state production timing or output details.

Impact and signal

Medium impactImpact score: 60/100

Affected components and suppliers

3-nanometer logic chips
TSMCKumamotoMETI3nmapproval

Source and time

Source: DigiTimes Asia · 10/17/2026 · View original source

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