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GaN FET meets megawatt-scale demands

What happened

Renesas is sampling what it says is the industry's first 650-V GaN FET with dual-side cooling for high-density power conversion in 800-V HVDC AI data centers, part number TP65H020G4PLSGBD, with a 20-mΩ on-resistance that Renesas says is among the lowest in its class. Unlike conventional top-side-cooled packages, the device dissipates heat from both the top and bottom, lowering top-side thermal impedance by 10%; its 8×8-mm PQFN package reduces footprint by 57% compared with the 10×15-mm TOLT package. The D-mode FET is built on the Gen IV Plus GaN architecture for systems operating at up to 700 V, targeting the 800-V DC/DC intermediate-bus converter stage, which steps down to 48 V, 12 V, or 6 V, as well as the battery-backup and capacitor-bank stages of the sidecar power rack. The device can be driven with a standard silicon gate driver and is pin-to-pin compatible with E-mode GaN devices, and its higher 4-V typical threshold voltage provides improved noise immunity. Mass production of the TP65H020G4PLSGBD is planned for mid-2027 and therefore remains a plan, not achieved volume production.

Impact and signal

Medium impactImpact score: 40/100

Affected components and suppliers

650-V GaN FET
GaN FET650-Vdual-side cooling800-V HVDC AI data centersGen IV Plus GaN architecturesampling

Source and time

Source: EDN · 10/7/2026 · View original source

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