NuAxiSemiconductor trade intelligence
Panel-level packaging is quietly picking up momentum.
What happened
TSMC is advancing its panel-level packaging (CoPoS) technology, with a pilot line in Taiwan targeting readiness by June and plans to include SoIC and CoPoS at its second Arizona packaging site for 2029-30. This represents a long-term R&D and capacity roadmap for advanced packaging, a key area for future chip performance. Watch: No immediate supply or price impact, but signals TSMC's commitment to next-gen packaging capacity.
Impact and signal
Low impactImpact score: 15/100
Affected components and suppliers
Advanced Packaging
packagingcapacity-expansionrd-milestone
Source and time
Source: TrendForce Official (Market Data) · 4/12/2026 · View original source
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