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RISC-V Has Momentum. The Real Question Is Who Can Deliver

What happened

Akeana taped out a 4nm Alpine test chip in December 2025 featuring an 8-core out-of-order RISC-V cluster. This addresses the execution gap in the RISC-V ecosystem. The event signals progress in high-performance RISC-V silicon development.

Impact and signal

Low impactImpact score: 25/100

Affected components and suppliers

RISC-V SoC4nm SoC
Akeana
RISC-VTape-outSilicon4nm

Source and time

Source: SemiWiki · 4/6/2026 · View original source

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