[Inside the Research] In the AI era, NAND moves beyond storage to computing… 3D FeNAND co-optimization at IEEE

What happened

In an SK hynix Newsroom article series [Inside the Research] Part 2 dated October 14, 2026, the company detailed its research paper "Co-Optimizing Cell, Non-Cell, and Page Schemes for Energy Efficient Analog Computing in 3D FeNAND," published in the 2025 IEEE International Electron Devices Meeting (IEDM), authored by Won-Tae Koo and Jihun Kim of SK hynix's Global RTC. The research proposes a 3D FeNAND-based analog compute-in-memory (A-CiM) architecture that merges storage and computation, and by co-optimizing cell, non-cell (interconnect/word line), and page schemes, achieves approximately 10 to 20 times higher throughput and around 4,000 to 5,000 times greater energy efficiency than conventional 3D arrays under the same chip-area constraints; the article notes these figures reflect 3D FeNAND's high-density advantage over conventional 2D nonvolatile memory arrays widely studied as A-CiM candidates. Reported optimization results include: using a low-resistance word line metal improved throughput by up to 16% and energy efficiency by up to 3%; air gaps reduced word-line parasitic capacitance by approximately 60%, improving throughput by 1.2 times and energy efficiency by two times; jointly optimizing word line resistance and capacitance improved throughput by up to 1.4 times and energy efficiency by up to 2.2 times; in-page pipelining (IPP) doubled energy efficiency and improved throughput by nine times versus the baseline; and splitting a conventional 16KB page into four 4KB subpages improved energy efficiency by 1.2 times and throughput by 1.7 times. The team also demonstrated four-level-per-cell operation in the low-current region with stable data retention at the 300mm wafer scale. The article states the research shows NAND's potential to expand beyond a storage medium into a computing medium; the source contains no price, shipment, capacity, or market-condition information.

Impact and signal

Affected components and suppliers

Source and time

Source: SK Hynix Newsroom · 10/13/2026 · View original source