AI can design the chip, manufacturing it is harder

What happened

This is an analysis article authored by Dr. Moh Kolbehdari, senior director of IC/packaging at Socionext US. It states that AI is getting better at semiconductor design—searching design spaces, optimizing constraints, generating layouts, and interacting with established EDA flows—but that there is a major difference between designing a chip and manufacturing one: design lives in a structured environment of models, rules, constraints and libraries, while manufacturing creates a physical system affected by process conditions, materials, equipment behavior, geometry, assembly sequence, temperature, loading and time, so design intent is not the same as built reality. Using advanced packaging as the example, it notes that nominal values such as bump pitch, stand-off, bond-line thickness, die placement, co-planarity, alignment, substrate flatness, underfill thickness and thermal interfaces exist as distributions after manufacturing, and warpage, die tilt and underfill conditions can later appear as delamination, fatigue, optical coupling loss, thermal degradation and electrical margin loss. The author argues manufacturing AI must understand physical state using process history, equipment conditions, material lots, metrology, defect maps and electrical test; that metrology (warpage measurement, acoustic inspection, X-ray, CT, optical alignment measurement, thermal mapping, electrical test) must become part of the intelligence loop; that correlation is not causality and design of experiments (DOE) and controlled perturbation remain essential; that tool drift, material-lot changes and chamber aging require continuously updated reference conditions rather than a fixed baseline; and that the final question is whether engineers can trust AI manufacturing recommendations. The source does not state the cause of any event, and the article involves no specific company event, price, capacity or policy change.

Impact and signal

Affected components and suppliers

Source and time

Source: EDN · 10/29/2026 · View original source