NuAxiSemiconductor trade intelligence

NVIDIA Cuts HBM4 Speed and NVLink Bandwidth Targets for "Vera Rubin"

What happened

NVIDIA has officially implemented specification reductions across its "Vera Rubin" product line. According to the updated product specification sheet, HBM4 memory speed has been reduced from the previous 11.7 Gbps per pin to 9.6 Gbps per pin; in the "Vera Rubin" NVL72 rack-scale solution, total memory bandwidth is now 1,400 TB/s, down from the previously advertised 1,580 TB/s. On the interconnect side, NVLink bandwidth per GPU has been reduced from 1.8 TB/s to 1.5 TB/s, and bidirectional NVLink GPU bandwidth correspondingly falls from 3.6 TB/s to 3 TB/s. According to the source, the cause is signal integrity: NVIDIA reportedly lowered the NVLink Nyquist frequency target from 56 GHz to 47 GHz, which reduces the electrical demands on the SerDes, cables, and materials and can improve manufacturing yields and overall feasibility at the cost of some peak interconnect bandwidth; on the memory side, it indicates the company's implementation of memory bus width and overall electrical signaling is insufficient to support higher speeds. The source also notes this issue does not stem directly from NVIDIA's suppliers.