Executive Interview with Victor Lopez of RaiderChip

What happened

Victor Lopez, Co-Founder and CTO of RaiderChip with over 20 years of experience in FPGA and ASIC design, gives an interview about the company. RaiderChip is a European fabless semiconductor company founded in 2024, developing a proprietary NPU architecture to bring Generative AI directly to edge devices; its business model combines chip development with licensing the NPU architecture as IP for integration into third-party SoCs. The technology targets Transformer inference, with strongest application areas in robotics, automotive, and industrial automation. The company is currently moving towards the tape-out of Kairós, its first-generation chip (a plan in progress, not yet completed); in the meantime it offers demonstrations on an FPGA-based NPU prototype that supports more than 50 models and is available for evaluation under a non-disclosure agreement. The company also presented a robotics demonstration: robots and their physics are simulated in MuJoCo, Google DeepMind's physics simulator, while the intelligence runs on real hardware, the Kairós FPGA-based NPU prototype; a speech recognition model transcribes instructions, a four-billion-parameter reasoning model interprets objectives and plans movements as a timed sequence of velocities, and all ten models, including speech recognition, reasoning, and robotic control policies, execute concurrently on a single NPU, locally and in real time, without any cloud connection. Lopez also cites customer concerns about technological sovereignty and strategic dependence on a small number of international suppliers of advanced technologies, noting recent geopolitical tensions and export restrictions on advanced hardware.

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Source and time

Source: SemiWiki · 10/25/2026 · View original source