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Samsung Showcases New Technologies for Next-Generation DRAM
What happened
Samsung presented a 4F² DRAM prototype at ISSCC 2026, utilizing vertical channel transistors and wafer-to-wafer bonding. The new architecture aims to reduce cell size by ~30% and increase wafer output by ~20% to overcome scaling limits. Neutral: This is a long-term R&D milestone with no immediate impact on supply, demand, or pricing for current-generation DRAM.
Impact and signal
Low impactImpact score: 10/100
Affected components and suppliers
rdtechnologyscaling
Source and time
Source: The Elec · 3/4/2026 · View original source
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